From: Julian Hascoet <jhascoet@xxxxxxxxxxxxx> Make sure the i/d caches start clean after enabling them. Also, make sure there are no outstanding loads and/or stores before enabling them. This might fix incoherency issues between caches and memory during the boot of barebox. Signed-off-by: Julien Hascoet <jhascoet@xxxxxxxxxxxxx> Signed-off-by: Julian Vetter <jvetter@xxxxxxxxxxxxx> Reviewed-by: Yann Sionneau <ysionneau@xxxxxxxxxxxxx> Reviewed-by: Jonathan Borne <jborne@xxxxxxxxxxxxx> --- arch/kvx/cpu/start.S | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/kvx/cpu/start.S b/arch/kvx/cpu/start.S index 342c7d38a5..853676a836 100644 --- a/arch/kvx/cpu/start.S +++ b/arch/kvx/cpu/start.S @@ -50,10 +50,21 @@ ENTRY(kvx_start) ;; /* Setup default processor status */ make $r25 = PS_WFXL_START_VALUE + /* Make sure there is no outstanding + * load(s)/store(s) before dcache enable + */ + fence ;; wfxl $ps, $r25 ;; + /* Make sure icache starts clean */ + i1inval + ;; + barrier + ;; make $r25 = PCR_WFXM_START_VALUE + /* Make sure dcache starts clean */ + d1inval ;; wfxm $pcr, $r25 ;; -- 2.34.1
