[PATCH 08/14] ARM: Arria10: xload: kick watchdog

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To be sure, that the watchdog doesn't prematurely triggers, kick it when
things are expected to take a little bit longer.

Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
---
 arch/arm/mach-socfpga/arria10-xload.c |  6 ++++++
 include/mach/socfpga/arria10-fpga.h   |  1 +
 include/mach/socfpga/generic.h        | 11 +++++++++++
 3 files changed, 18 insertions(+)

diff --git a/arch/arm/mach-socfpga/arria10-xload.c b/arch/arm/mach-socfpga/arria10-xload.c
index e9a12ca9bb..f846781e8f 100644
--- a/arch/arm/mach-socfpga/arria10-xload.c
+++ b/arch/arm/mach-socfpga/arria10-xload.c
@@ -46,6 +46,7 @@ static int a10_fpga_wait_for_condone(void)
 
 		if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN)
 			return 0;
+		arria10_kick_l4wd0();
 
 		if ((reg & A10_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN) == 0)
 			return -EIO;
@@ -69,6 +70,7 @@ static void a10_fpga_generate_dclks(uint32_t count)
 	timeout = 10000000;
 
 	while (!readl(ARRIA10_FPGAMGRREGS_ADDR + A10_FPGAMGR_DCLKSTAT_OFST)) {
+		arria10_kick_l4wd0();
 		if (timeout-- < 0)
 			return;
 	}
@@ -357,10 +359,12 @@ static inline int __arria10_load_fpga(void *buf, uint32_t sector, uint32_t end)
 {
 	int ret;
 
+	arria10_kick_l4wd0();
 	arria10_read_blocks(buf, sector + bitstream.first_sec, SZ_16K);
 
 	sector += SZ_16K / SECTOR_SIZE;
 
+	arria10_kick_l4wd0();
 	ret = a10_fpga_init(buf);
 	if (ret)
 		return -EAGAIN;
@@ -370,10 +374,12 @@ static inline int __arria10_load_fpga(void *buf, uint32_t sector, uint32_t end)
 		if (ret == -ENOSPC)
 			break;
 
+		arria10_kick_l4wd0();
 		sector += SZ_16K / SECTOR_SIZE;
 		ret = arria10_read_blocks(buf, sector, SZ_16K);
 	}
 
+	arria10_kick_l4wd0();
 	ret = a10_fpga_write_complete();
 	if (ret)
 		return -EAGAIN;
diff --git a/include/mach/socfpga/arria10-fpga.h b/include/mach/socfpga/arria10-fpga.h
index 3efad9a4f5..f76582eed7 100644
--- a/include/mach/socfpga/arria10-fpga.h
+++ b/include/mach/socfpga/arria10-fpga.h
@@ -20,6 +20,7 @@
 #define	__A10_FPGAMGR_H__
 
 #include <linux/bitops.h>
+#include <mach/socfpga/generic.h>
 #include <mach/socfpga/arria10-regs.h>
 
 #define A10_FPGAMGR_DCLKCNT_OFST				0x08
diff --git a/include/mach/socfpga/generic.h b/include/mach/socfpga/generic.h
index 1af086140f..270c309d7b 100644
--- a/include/mach/socfpga/generic.h
+++ b/include/mach/socfpga/generic.h
@@ -3,6 +3,8 @@
 #ifndef __MACH_SOCFPGA_GENERIC_H
 #define __MACH_SOCFPGA_GENERIC_H
 
+#include <mach/socfpga/arria10-regs.h>
+#include <mach/socfpga/arria10-reset-manager.h>
 #include <linux/types.h>
 
 struct socfpga_cm_config;
@@ -57,6 +59,15 @@ int arria10_device_init(struct arria10_mainpll_cfg *mainpll,
 			struct arria10_perpll_cfg *perpll,
 			uint32_t *pinmux);
 enum bootsource arria10_get_bootsource(void);
+static void inline arria10_kick_l4wd0(void)
+{
+	writel(0x76, ARRIA10_L4WD0_ADDR + 0xc);
+}
+static void inline arria10_watchdog_disable(void)
+{
+	setbits_le32(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER1MODRST,
+		     ARRIA10_RSTMGR_PER1MODRST_WATCHDOG0);
+}
 #else
 static inline void socfpga_arria10_mmc_init(void)
 {

-- 
2.43.2





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