Leave the L4 watchdog 0 running.
If a watchdog reset happens while booting, the bootrom attempts to load
the last valid bootloader identified by the initswlastld register.
As we now hang() in arria10-xload after 10 failed FPGA writing attempts,
we need the watchdog to trigger so that the bootrom can try to start the
next bootloader image as fallback.
Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
---
arch/arm/mach-socfpga/arria10-reset-manager.c | 9 ++++++---
arch/arm/mach-socfpga/arria10-xload.c | 5 +++++
include/mach/socfpga/generic.h | 2 ++
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-socfpga/arria10-reset-manager.c b/arch/arm/mach-socfpga/arria10-reset-manager.c
index 05440cf903..6f209e7045 100644
--- a/arch/arm/mach-socfpga/arria10-reset-manager.c
+++ b/arch/arm/mach-socfpga/arria10-reset-manager.c
@@ -33,9 +33,13 @@ void arria10_reset_peripherals(void)
}
/* disable all components except the ECC_OCP and bootsource */
- writel(0xffffffff, ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER1MODRST);
writel(~mask, ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER0MODRST);
+ mask = ARRIA10_RSTMGR_PER1MODRST_WATCHDOG0 |
+ ARRIA10_RSTMGR_PER1MODRST_L4SYSTIMER0;
+ /* disable all components except L4 watchdog */
+ writel(~mask, ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER1MODRST);
+
mask = 0xffffffff;
if (src == BOOTSOURCE_MMC) {
@@ -65,8 +69,7 @@ void arria10_reset_deassert_dedicated_peripherals(void)
clrbits_le32(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER0MODRST, mask);
- mask = ARRIA10_RSTMGR_PER1MODRST_L4SYSTIMER0 |
- ARRIA10_RSTMGR_PER1MODRST_UART1 |
+ mask = ARRIA10_RSTMGR_PER1MODRST_UART1 |
ARRIA10_RSTMGR_PER1MODRST_UART0;
clrbits_le32(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER1MODRST, mask);
diff --git a/arch/arm/mach-socfpga/arria10-xload.c b/arch/arm/mach-socfpga/arria10-xload.c
index db3cc209ee..7b0d6f00fb 100644
--- a/arch/arm/mach-socfpga/arria10-xload.c
+++ b/arch/arm/mach-socfpga/arria10-xload.c
@@ -437,6 +437,11 @@ void arria10_start_image(int offset)
if (ret)
hang();
+ /* mark image in OCRAM as valid */
+ writel(ARRIA10_SYSMGR_ROM_INITSWSTATE_VALID, ARRIA10_SYSMGR_ROM_INITSWSTATE);
+
+ arria10_watchdog_disable();
+
bb = buf;
bb();
diff --git a/include/mach/socfpga/generic.h b/include/mach/socfpga/generic.h
index 6c359e2abb..1af086140f 100644
--- a/include/mach/socfpga/generic.h
+++ b/include/mach/socfpga/generic.h
@@ -85,6 +85,8 @@ static inline int arria10_device_init(struct arria10_mainpll_cfg *mainpll,
{
return 0;
}
+static void arria10_kick_l4wd0(void) {}
+static void arria10_watchdog_disable(void) {}
#endif
static inline void __udelay(unsigned us)
--
2.43.2
