To better describe why the BBM is at offset 2000 describe the full misinterpretation^Wmapping of the NAND memory that the i.MX hardware implements. Also adapt the comment to reality: A BBT is created automatically since commit 2ad441bb7e78 ("mtd: nand-imx: Create BBT automatically when necessary") which was included in v2020.03.0. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> --- drivers/mtd/nand/raw/mxc_nand.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c index c6533b20fc0f..f7ef2e4374a9 100644 --- a/drivers/mtd/nand/raw/mxc_nand.c +++ b/drivers/mtd/nand/raw/mxc_nand.c @@ -1528,20 +1528,32 @@ static const struct nand_controller_ops mxcnd_controller_ops = { * 512b data + 16b OOB + * 512b data + 16b OOB * + * So the mapping between original NAND addressing (as intended by the chip + * vendor) and interpretation when accessed via the i.MX NAND controller is as + * follows: + * + * original | i.MX + * ---------------------+--------------------- + * data 0x0000 - 0x0200 | data 0x0000 - 0x0200 + * data 0x0200 - 0x0210 | oob 0x0000 - 0x0010 + * data 0x0210 - 0x0410 | data 0x0200 - 0x0400 + * data 0x0410 - 0x0420 | oob 0x0010 - 0x0020 + * data 0x0420 - 0x0620 | data 0x0400 - 0x0600 + * data 0x0620 - 0x0630 | oob 0x0020 - 0x0030 + * data 0x0630 - 0x0800 | data 0x0600 - 0x07d0 + * oob 0x0000 - 0x0030 | data 0x07d0 - 0x0800 + * oob 0x0030 - 0x0040 | oob 0x0030 - 0x0040 + * * This means that the factory provided bad block marker ends up - * in the page data at offset 2000 instead of in the OOB data. + * in the page data at offset 2000 = 0x7d0 instead of in the OOB data. * - * To preserve the factory bad block information we take the following - * strategy: - * - * - If the NAND driver detects that no flash BBT is present on 2k NAND - * chips it will not create one because it would do so based on the wrong - * BBM position - * - This command is used to create a flash BBT then. + * If the NAND driver detects that no flash BBT is present on a 2k NAND + * chip it will create one automatically in the assumption that the NAND is + * pristine (that is completely erased with only vendor BBMs in the OOB) to + * preserve factory bad block information. * * From this point on we can forget about the BBMs and rely completely * on the flash BBT. - * */ static int checkbad(struct nand_chip *chip, loff_t ofs) { @@ -1562,8 +1574,10 @@ static int checkbad(struct nand_chip *chip, loff_t ofs) return ret; if (buf[2000] != 0xff) + /* block considered bad */ return 1; + /* block considered good */ return 0; } -- 2.43.0