According to NXP AT14149 the TX_CLK direction must be set to output
when the ENET is used in RMII mode.
Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
---
drivers/net/designware_imx.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/net/designware_imx.c b/drivers/net/designware_imx.c
index ab60d98298..2cc707ecac 100644
--- a/drivers/net/designware_imx.c
+++ b/drivers/net/designware_imx.c
@@ -26,6 +26,10 @@
#define RMII_RESET_SPEED (0x3 << 14)
+#define MX93_GPR_ENET_CLK_SEL_OFFSET 0x4
+#define MX93_ENET_CLK_ENET_QOS_TX_CLK_SEL_MASK GENMASK(0, 0)
+#define MX93_ENET_CLK_ENET_QOS_TX_CLK_SEL (0x1 << 0)
+
struct eqos_imx_soc_data {
int (*set_interface_mode)(struct eqos *eqos);
void (*fix_soc_reset)(struct eqos *eqos, u32 *mac_regs);
@@ -155,6 +159,14 @@ static int eqos_imx93_set_interface_mode(struct eqos *eqos)
break;
case PHY_INTERFACE_MODE_RMII:
val = MX93_GPR_ENET_QOS_INTF_SEL_RMII;
+
+ /* According to NXP AN14149, the direction of the
+ * TX_CLK must be set to output in RMII mode.
+ */
+ regmap_update_bits(priv->intf_regmap,
+ priv->intf_reg_off + MX93_GPR_ENET_CLK_SEL_OFFSET,
+ MX93_ENET_CLK_ENET_QOS_TX_CLK_SEL_MASK,
+ MX93_ENET_CLK_ENET_QOS_TX_CLK_SEL);
break;
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
--
2.43.2
