When the link is not up the first time we test for it, then we wait for
100ms before trying again. This adds unnecessary delays when the link
is up considerably faster than 100ms. As we do not have anything useful
to do with our CPU time during polling for link we can equally well poll
as fast as we can.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
drivers/pci/pcie-designware.c | 8 +++++---
drivers/pci/pcie-designware.h | 4 ----
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c
index 9c8bc772f9..72820de282 100644
--- a/drivers/pci/pcie-designware.c
+++ b/drivers/pci/pcie-designware.c
@@ -237,15 +237,17 @@ void dw_pcie_disable_atu(struct dw_pcie *pci, int index,
int dw_pcie_wait_for_link(struct dw_pcie *pci)
{
- int retries;
+ u64 start = get_time_ns();
/* Check if the link is up or not */
- for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) {
+ while (1) {
if (dw_pcie_link_up(pci)) {
dev_dbg(pci->dev, "Link up\n");
return 0;
}
- udelay(LINK_WAIT_USLEEP_MAX);
+
+ if (is_timeout(start, SECOND))
+ break;
}
dev_err(pci->dev, "Phy link never came up\n");
diff --git a/drivers/pci/pcie-designware.h b/drivers/pci/pcie-designware.h
index 9840dde266..96a269dc59 100644
--- a/drivers/pci/pcie-designware.h
+++ b/drivers/pci/pcie-designware.h
@@ -13,10 +13,6 @@
#include <linux/bitfield.h>
-/* Parameters for the waiting for link up routine */
-#define LINK_WAIT_MAX_RETRIES 10
-#define LINK_WAIT_USLEEP_MAX 100000
-
/* Parameters for the waiting for iATU enabled routine */
#define LINK_WAIT_MAX_IATU_RETRIES 5
#define LINK_WAIT_IATU_MAX 10000
--
2.39.2
