On Thu, Mar 14, 2024 at 07:47:36PM +0100, Steffen Trumtrar wrote:
> The ZynpMP 8.9a has an Arasan IP core that supports HS200 tuning.
> Register the callback with the mci-core.
>
> Arasan uses the SDHCI tuning method.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> Reviewed-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
> ---
> drivers/mci/arasan-sdhci.c | 62 +++++++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 59 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
> index eb81ff907b..80489e98f4 100644
> --- a/drivers/mci/arasan-sdhci.c
> +++ b/drivers/mci/arasan-sdhci.c
> @@ -128,6 +128,46 @@ static int arasan_sdhci_reset(struct arasan_sdhci_host *host, u8 mask)
> return 0;
> }
>
> +static void arasan_zynqmp_dll_reset(struct arasan_sdhci_host *host, u32 deviceid)
> +{
> + u16 clk;
> +
> + clk = sdhci_read16(&host->sdhci, SDHCI_CLOCK_CONTROL);
> + clk &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
> + sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, clk);
> +
> + /* Issue DLL Reset */
> + zynqmp_pm_sd_dll_reset(deviceid, PM_DLL_RESET_PULSE);
> +
> + clk = sdhci_read16(&host->sdhci, SDHCI_CLOCK_CONTROL);
> +
> + sdhci_enable_clk(&host->sdhci, clk);
> +}
> +
> +static int arasan_zynqmp_execute_tuning(struct mci_host *mci, u32 opcode)
> +{
> + struct arasan_sdhci_host *host = to_arasan_sdhci_host(mci);
> + struct clk_hw *hw = &host->clk_data.sdcardclk_hw;
> + const char *clk_name = clk_hw_get_name(hw);
> + u32 device_id = !strcmp(clk_name, "clk_out_sd0") ? NODE_SD_0 :
> + NODE_SD_1;
> + int err;
> +
> + /* ZynqMP SD controller does not perform auto tuning in DDR50 mode */
> + if (mci->timing == MMC_TIMING_UHS_DDR50)
> + return 0;
> +
> + arasan_zynqmp_dll_reset(host, device_id);
> +
> + err = sdhci_execute_tuning(&host->sdhci, opcode);
> + if (err)
> + return err;
> +
> + arasan_zynqmp_dll_reset(host, device_id);
> +
> + return 0;
> +}
> +
> static int arasan_sdhci_init(struct mci_host *mci, struct device *dev)
> {
> struct arasan_sdhci_host *host = to_arasan_sdhci_host(mci);
> @@ -226,8 +266,9 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
> cmd, data, false, &command, &xfer);
>
> sdhci_write8(&host->sdhci, SDHCI_TIMEOUT_CONTROL, TIMEOUT_VAL);
> - if (data) {
> + if (xfer)
> sdhci_write16(&host->sdhci, SDHCI_TRANSFER_MODE, xfer);
> + if (data) {
> sdhci_write16(&host->sdhci, SDHCI_BLOCK_SIZE,
> SDHCI_DMA_BOUNDARY_512K | SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize));
> sdhci_write16(&host->sdhci, SDHCI_BLOCK_COUNT, data->blocks);
> @@ -235,6 +276,10 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
> sdhci_write32(&host->sdhci, SDHCI_ARGUMENT, cmd->cmdarg);
> sdhci_write16(&host->sdhci, SDHCI_COMMAND, command);
>
> + /* CMD19/21 generate _only_ Buffer Read Ready interrupt */
> + if (cmd->cmdidx == MMC_SEND_TUNING_BLOCK || cmd->cmdidx == MMC_SEND_TUNING_BLOCK_HS200)
> + mask = SDHCI_INT_DATA_AVAIL;
> +
Thist hunk conflicts with b80c0e1ec6 ("mci: arasan: add dma support"):
<<<<<<< HEAD
ret = sdhci_wait_for_done(&host->sdhci, SDHCI_INT_CMD_COMPLETE);
=======
/* CMD19/21 generate _only_ Buffer Read Ready interrupt */
if (cmd->cmdidx == MMC_SEND_TUNING_BLOCK || cmd->cmdidx == MMC_SEND_TUNING_BLOCK_HS200)
mask = SDHCI_INT_DATA_AVAIL;
ret = sdhci_wait_for_done(&host->sdhci, mask);
>>>>>>> for-next/mmc-hs200
I am not sure how to resolve this just by looking at it. Please rebase
your series on that patch.
Sascha
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