The tester fuses are written to the OCOTP by NXP during production.
So far, we only evaluated tester4 to determine which peripherals
are missing from the SoC. On the i.MX8MP, VPU and CPUs existence is
instead encoded into the tester3 fuse word. In preparation for adding
support for tester4, rename the existing masks to be tester4-specific.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
drivers/nvmem/ocotp.c | 14 +++++++-------
drivers/soc/imx/imx8m-featctrl.c | 32 +++++++++++++++++++-------------
include/soc/imx8m/featctrl.h | 12 +++++++-----
3 files changed, 33 insertions(+), 25 deletions(-)
diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c
index 66a88ae48033..ccdc8a417ed1 100644
--- a/drivers/nvmem/ocotp.c
+++ b/drivers/nvmem/ocotp.c
@@ -959,9 +959,9 @@ static struct imx_ocotp_data vf610_ocotp_data = {
};
static struct imx8m_featctrl_data imx8mp_featctrl_data = {
- .gpu_bitmask = 0xc0,
- .mipi_dsi_bitmask = 0x60000,
- .isp_bitmask = 0x3,
+ .tester4.gpu_bitmask = 0xc0,
+ .tester4.mipi_dsi_bitmask = 0x60000,
+ .tester4.isp_bitmask = 0x3,
};
static struct imx_ocotp_data imx8mp_ocotp_data = {
@@ -990,8 +990,8 @@ static struct imx_ocotp_data imx8mq_ocotp_data = {
};
static struct imx8m_featctrl_data imx8mm_featctrl_data = {
- .vpu_bitmask = 0x1c0000,
- .check_cpus = true,
+ .tester4.vpu_bitmask = 0x1c0000,
+ .tester4.cpu_bitmask = 0x3,
};
static struct imx_ocotp_data imx8mm_ocotp_data = {
@@ -1008,8 +1008,8 @@ static struct imx_ocotp_data imx8mm_ocotp_data = {
};
static struct imx8m_featctrl_data imx8mn_featctrl_data = {
- .gpu_bitmask = 0x1000000,
- .check_cpus = true,
+ .tester4.gpu_bitmask = 0x1000000,
+ .tester4.cpu_bitmask = 0x3,
};
static struct imx_ocotp_data imx8mn_ocotp_data = {
diff --git a/drivers/soc/imx/imx8m-featctrl.c b/drivers/soc/imx/imx8m-featctrl.c
index 9a2b66555dce..23a3f990160d 100644
--- a/drivers/soc/imx/imx8m-featctrl.c
+++ b/drivers/soc/imx/imx8m-featctrl.c
@@ -33,6 +33,19 @@ static inline bool is_fused(u32 val, u32 bitmask)
return bitmask && (val & bitmask) == bitmask;
}
+#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
+
+static void check_cpus(u32 mask, u32 reg, unsigned long *features)
+{
+ switch (field_get(mask, reg)) {
+ case 0b11:
+ clear_bit(IMX8M_FEAT_CPU_DUAL, features);
+ fallthrough;
+ case 0b10:
+ clear_bit(IMX8M_FEAT_CPU_QUAD, features);
+ }
+}
+
int imx8m_feat_ctrl_init(struct device *dev, u32 tester4,
const struct imx8m_featctrl_data *data)
{
@@ -49,24 +62,17 @@ int imx8m_feat_ctrl_init(struct device *dev, u32 tester4,
bitmap_fill(features, IMX8M_FEAT_END);
- if (is_fused(tester4, data->vpu_bitmask))
+ if (is_fused(tester4, data->tester4.vpu_bitmask))
clear_bit(IMX8M_FEAT_VPU, features);
- if (is_fused(tester4, data->gpu_bitmask))
+ if (is_fused(tester4, data->tester4.gpu_bitmask))
clear_bit(IMX8M_FEAT_GPU, features);
- if (is_fused(tester4, data->mipi_dsi_bitmask))
+ if (is_fused(tester4, data->tester4.mipi_dsi_bitmask))
clear_bit(IMX8M_FEAT_MIPI_DSI, features);
- if (is_fused(tester4, data->isp_bitmask))
+ if (is_fused(tester4, data->tester4.isp_bitmask))
clear_bit(IMX8M_FEAT_ISP, features);
- if (data->check_cpus) {
- switch (tester4 & 3) {
- case 0b11:
- clear_bit(IMX8M_FEAT_CPU_DUAL, features);
- fallthrough;
- case 0b10:
- clear_bit(IMX8M_FEAT_CPU_QUAD, features);
- }
- }
+ if (data->tester4.cpu_bitmask)
+ check_cpus(data->tester4.cpu_bitmask, tester4, features);
priv->feat.dev = dev;
priv->feat.check = imx8m_feat_check;
diff --git a/include/soc/imx8m/featctrl.h b/include/soc/imx8m/featctrl.h
index 91d14bc68c0a..cfbc3fad80f4 100644
--- a/include/soc/imx8m/featctrl.h
+++ b/include/soc/imx8m/featctrl.h
@@ -7,11 +7,13 @@
#include <linux/types.h>
struct imx8m_featctrl_data {
- u32 vpu_bitmask;
- u32 gpu_bitmask;
- u32 mipi_dsi_bitmask;
- u32 isp_bitmask;
- bool check_cpus;
+ struct {
+ u32 vpu_bitmask;
+ u32 gpu_bitmask;
+ u32 mipi_dsi_bitmask;
+ u32 isp_bitmask;
+ u32 cpu_bitmask;
+ } tester4;
};
struct device;
--
2.39.2
