Hello Ahmad, Hello Sascha,
On 17.01.24 08:20, Sascha Hauer wrote:
On Tue, Jan 16, 2024 at 09:13:48AM +0100, Ahmad Fatoum wrote:
Hello Stefan,
On 12.01.24 16:21, Stefan Kerkmann wrote:
+static enum hab_status hab_sip_report_event(enum hab_status status,
+ uint32_t index, uint8_t *event,
+ size_t *bytes)
+{
+ struct arm_smccc_res res;
+
+ v8_flush_dcache_range((unsigned long)bytes,
+ (unsigned long)bytes + sizeof(*bytes));
+
+ if (event)
+ v8_flush_dcache_range((unsigned long)event,
+ (unsigned long)event + *bytes);
I am not too happy about the cache maintenance here. *event and *bytes
are both stack memory, which share a cache line with other stack variables.
This issue exists in hab_sip_report_status too, so this need not delay
application of the series, but it would nice to get this cleaned up,
eventually.
A first attempt was here:
https://lore.barebox.org/barebox/20230921095649.310666-1-a.fatoum@xxxxxxxxxxxxxx/
I am also unsure if cache maintenance is correct, see:
https://lists.trustedfirmware.org/archives/list/tf-a@xxxxxxxxxxxxxxxxxxxxxxxxx/message/D3PIAW7G2B3JQIH5BGMUZZKHPGNMXUUT/
When implementing the cache maintenance I had a quick talk with a
colleague and it wasn't clear if this is needed at all. In the end I
opted for "better safe than sorry". I suggest to wait a bit if there is
a definitive answer from the TF-A list and remove it altogether if it
turns out to be unnecessary.
+static enum hab_status imx8m_report_event(enum hab_status status,
+ uint32_t index, uint8_t *event,
+ size_t *bytes)
+{
+ if (cpu_is_mx8mm() || cpu_is_mx8mn() || cpu_is_imx8mp())
I suggest we swap the if else clauses and use cpu_is_mx8mq(). imx8m_read_sram_events
only supports that one SoC now and it's likely that new SoCs (e.g. i.MX9) will
also reuse hab_sip_report_event. Could you send a fixup?
I fixed this part up here.
Thank you!
Sascha
Stefan
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