[PATCH 17/19] mci: imx-esdhc-pbl: factor out common function

[Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>]

Factor out some code that can be re-used by upcoming ls1028a support.

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
 drivers/mci/imx-esdhc-pbl.c | 66 ++++++++++++++++++++++---------------
 1 file changed, 39 insertions(+), 27 deletions(-)

diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c
index 892329de51..c13830d726 100644
--- a/drivers/mci/imx-esdhc-pbl.c
+++ b/drivers/mci/imx-esdhc-pbl.c
@@ -17,7 +17,7 @@
 #include <mach/imx/imx8mm-regs.h>
 #include <mach/imx/imx-header.h>
 #endif
-#ifdef CONFIG_ARCH_LS1046
+#ifdef CONFIG_ARCH_LAYERSCAPE
 #include <mach/layerscape/xload.h>
 #endif
 #include "sdhci.h"
@@ -298,7 +298,39 @@ int imx8mn_esdhc_load_image(int instance, bool start)
 	__alias(imx8mp_esdhc_load_image);
 #endif
 
-#ifdef CONFIG_ARCH_LS1046
+#ifdef CONFIG_ARCH_LAYERSCAPE
+
+static int layerscape_esdhc_load_image(struct fsl_esdhc_host *host, void *adr, unsigned long size,
+				       uint32_t div_val)
+{
+	uint32_t val;
+	int ret;
+
+	esdhc_populate_sdhci(host);
+	sdhci_write32(&host->sdhci, IMX_SDHCI_WML, 0);
+
+	/*
+	 * The ROM leaves us here with a clock frequency of around 400kHz. Speed
+	 * this up a bit. FIXME: The resulting frequency has not yet been verified
+	 * to work on all cards.
+	 */
+	val = sdhci_read32(&host->sdhci, SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET);
+	val &= ~0x0000fff0;
+	val |= div_val;
+	sdhci_write32(&host->sdhci, SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET, val);
+
+	sdhci_write32(&host->sdhci, ESDHC_DMA_SYSCTL, ESDHC_SYSCTL_DMA_SNOOP);
+
+	ret = esdhc_read_blocks(host, adr, size);
+	if (ret) {
+		pr_err("%s: reading blocks failed with: %d\n", __func__, ret);
+		return ret;
+	}
+
+	sync_caches_for_execution();
+
+	return 0;
+}
 
 /*
  * The image on the SD card starts at 0x1000. We reserved 128KiB for the PBL,
@@ -319,7 +351,6 @@ int imx8mn_esdhc_load_image(int instance, bool start)
 int ls1046a_esdhc_start_image(unsigned long r0, unsigned long r1, unsigned long r2)
 {
 	int ret;
-	uint32_t val;
 	struct esdhc_soc_data data = {
 		.flags = ESDHC_FLAG_MULTIBLK_NO_INT | ESDHC_FLAG_BIGENDIAN,
 	};
@@ -327,33 +358,14 @@ int ls1046a_esdhc_start_image(unsigned long r0, unsigned long r1, unsigned long
 		.sdhci.base = IOMEM(0x01560000),
 		.socdata = &data,
 	};
-	unsigned long sdram = 0x80000000;
+	void *sdram = (void *)0x80000000;
+	unsigned long size = ALIGN(barebox_image_size + LS1046A_SD_IMAGE_OFFSET, 512);
 	void (*barebox)(unsigned long, unsigned long, unsigned long) =
-		(void *)(sdram + LS1046A_SD_IMAGE_OFFSET);
+		(sdram + LS1046A_SD_IMAGE_OFFSET);
 
-	esdhc_populate_sdhci(&host);
-	sdhci_write32(&host.sdhci, IMX_SDHCI_WML, 0);
-
-	/*
-	 * The ROM leaves us here with a clock frequency of around 400kHz. Speed
-	 * this up a bit. FIXME: The resulting frequency has not yet been verified
-	 * to work on all cards.
-	 */
-	val = sdhci_read32(&host.sdhci, SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET);
-	val &= ~0x0000fff0;
-	val |= (8 << 8) | (3 << 4);
-	sdhci_write32(&host.sdhci, SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET, val);
-
-	sdhci_write32(&host.sdhci, ESDHC_DMA_SYSCTL, ESDHC_SYSCTL_DMA_SNOOP);
-
-	ret = esdhc_read_blocks(&host, (void *)sdram,
-			ALIGN(barebox_image_size + LS1046A_SD_IMAGE_OFFSET, 512));
-	if (ret) {
-		pr_err("%s: reading blocks failed with: %d\n", __func__, ret);
+	ret = layerscape_esdhc_load_image(&host, sdram, size, (8 << 8) | (3 << 4));
+	if (ret)
 		return ret;
-	}
-
-	sync_caches_for_execution();
 
 	printf("Starting barebox\n");
 
-- 
2.39.2