On Thu, Nov 30, 2023 at 05:28:44PM +0300, Alexander Shiyan wrote: > Hello All. > > The latest version of the barebox does not work on a RK3568 with 4G memory. > With a similar board with 2G memory, everything works fine. > ... > NOTICE: BL31: v2.3():v2.3-607-gbf602aff1:cl > NOTICE: BL31: Built : 10:16:03, Jun 5 2023 > INFO: GICv3 without legacy support detected. > INFO: ARM GICv3 driver initialized in EL3 > INFO: pmu v1 is valid 220114 > INFO: Using opteed sec cpu_context! > INFO: boot cpu mask: 0 > INFO: BL31: Initializing runtime services > WARNING: No OPTEE provided by BL2 boot loader, Booting device without > OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK > ERROR: Error initializing runtime service opteed_fast > INFO: BL31: Preparing for EL3 exit to normal world > INFO: Entry point address = 0xb00000 > INFO: SPSR = 0x3c9 > >rockchip-dmc: rockchip_sdram_size(reg2=1000eaf1, reg3=30000001) > rockchip-dmc: rank 2 cs0_col 10 cs1_col 10 bk 3 cs0_row 16 cs1_row 16 > bw 2 row_3_4 0 > rockchip-dmc: rk3568_ram0_size() = 4026531840 > uncompress.c: memory at 0x00a00000, size 0xef600000 > mmu: enabling MMU, ttb @ 0xeffe0000 > ===STALL HERE=== > > Through various manipulations, I identified the faulty patch: "ARM: > mmu64: mark barebox text section executable during early init". This patch just triggers a bug elsewhere. alloc_pte() places PTEs with offset 0x8000 between them instead of the expected 0x1000. This means we leave the space reserved for PTEs. In case of the RK3568 with 8GiB of memory the PTEs go into the internal register space. I've sent a fix to the list, you're on Cc:. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
