Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- drivers/ddr/imx/helper.c | 4 ++-- drivers/ddr/imx/imx8m_ddr_init.c | 14 +++++++------- include/soc/imx/ddr.h | 4 +++- include/soc/imx8m/ddr.h | 2 -- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/ddr/imx/helper.c b/drivers/ddr/imx/helper.c index f38b9a0060..674ca7e4ac 100644 --- a/drivers/ddr/imx/helper.c +++ b/drivers/ddr/imx/helper.c @@ -27,7 +27,7 @@ void ddrphy_trained_csr_save(struct dram_controller *dram, struct dram_cfg_param dwc_ddrphy_apb_wr(dram, 0xd0000, 0x1); } -void *dram_config_save(struct dram_timing_info *timing_info, +void *dram_config_save(struct dram_controller *dram, struct dram_timing_info *timing_info, unsigned long saved_timing_base) { int i = 0; @@ -54,7 +54,7 @@ void *dram_config_save(struct dram_timing_info *timing_info, cfg++; } - if (imx8m_ddr_old_spreadsheet) { + if (dram->imx8m_ddr_old_spreadsheet) { cfg->reg = DDRC_ADDRMAP7(0); cfg->val = 0xf0f; cfg++; diff --git a/drivers/ddr/imx/imx8m_ddr_init.c b/drivers/ddr/imx/imx8m_ddr_init.c index 8d473a3e63..8b829645c0 100644 --- a/drivers/ddr/imx/imx8m_ddr_init.c +++ b/drivers/ddr/imx/imx8m_ddr_init.c @@ -13,19 +13,19 @@ #include <mach/imx/imx8m-regs.h> #include <mach/imx/imx8m-ccm-regs.h> -bool imx8m_ddr_old_spreadsheet = true; - struct dram_controller imx8m_dram_controller = { .phy_base = IOMEM(IP2APB_DDRPHY_IPS_BASE_ADDR(0)), }; -static void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) +static void ddr_cfg_umctl2(struct dram_controller *dram, struct dram_cfg_param *ddrc_cfg, int num) { int i = 0; + dram->imx8m_ddr_old_spreadsheet = true; + for (i = 0; i < num; i++) { if (ddrc_cfg->reg == DDRC_ADDRMAP7(0)) - imx8m_ddr_old_spreadsheet = false; + dram->imx8m_ddr_old_spreadsheet = false; reg32_write((unsigned long)ddrc_cfg->reg, ddrc_cfg->val); ddrc_cfg++; } @@ -35,7 +35,7 @@ static void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) * which falsifies the memory size read back from the controller * in barebox proper. */ - if (imx8m_ddr_old_spreadsheet) { + if (dram->imx8m_ddr_old_spreadsheet) { pr_warn("Working around old spreadsheet. Please regenerate\n"); /* * Alternatively, stick { DDRC_ADDRMAP7(0), 0xf0f } into @@ -518,7 +518,7 @@ int imx8m_ddr_init(struct dram_controller *dram, struct dram_timing_info *dram_t /* Step2: Program the dwc_ddr_umctl2 registers */ pr_debug("ddrc config start\n"); - ddr_cfg_umctl2(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); + ddr_cfg_umctl2(dram, dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); pr_debug("ddrc config done\n"); /* Step3: De-assert reset signal(core_ddrc_rstn & aresetn_n) */ @@ -640,7 +640,7 @@ int imx8m_ddr_init(struct dram_controller *dram, struct dram_timing_info *dram_t pr_debug("ddrmix config done\n"); /* save the dram timing config into memory */ - dram_config_save(dram_timing, IMX8M_SAVED_DRAM_TIMING_BASE); + dram_config_save(dram, dram_timing, IMX8M_SAVED_DRAM_TIMING_BASE); return 0; } diff --git a/include/soc/imx/ddr.h b/include/soc/imx/ddr.h index bc793cf3ed..581a3b461c 100644 --- a/include/soc/imx/ddr.h +++ b/include/soc/imx/ddr.h @@ -74,6 +74,7 @@ struct dram_controller { void __iomem *phy_base; void (*get_trained_CDD)(struct dram_controller *dram, u32 fsp); void (*set_dfi_clk)(struct dram_controller *dram, unsigned int drate_mhz); + bool imx8m_ddr_old_spreadsheet; }; void ddr_get_firmware_lpddr4(void); @@ -90,7 +91,8 @@ static inline void ddr_get_firmware(enum dram_type dram_type) int ddr_cfg_phy(struct dram_controller *dram, struct dram_timing_info *timing_info); void ddrphy_trained_csr_save(struct dram_controller *dram, struct dram_cfg_param *param, unsigned int num); -void *dram_config_save(struct dram_timing_info *info, unsigned long base); +void *dram_config_save(struct dram_controller *dram, struct dram_timing_info *info, + unsigned long base); /* utils function for ddr phy training */ int wait_ddrphy_training_complete(struct dram_controller *dram); diff --git a/include/soc/imx8m/ddr.h b/include/soc/imx8m/ddr.h index abd9961099..5df07772b3 100644 --- a/include/soc/imx8m/ddr.h +++ b/include/soc/imx8m/ddr.h @@ -374,8 +374,6 @@ static inline int imx8m_wait_ddrphy_training_complete(void) return wait_ddrphy_training_complete(&imx8m_dram_controller); } -extern bool imx8m_ddr_old_spreadsheet; - static inline void imx8m_ddr_load_train_code(enum dram_type dram_type, enum fw_type fw_type) { -- 2.39.2