It seems more reasonable to do that in PBL code that initializes all the other appropriate CP0 register bits. This also makes a corresponding call in barebox proper entry code redundant, paving the way to its removal. Signed-off-by: Denis Orlov <denorl2009@xxxxxxxxx> --- arch/mips/include/asm/pbl_macros.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h index cc81e06a64..61e12cd004 100644 --- a/arch/mips/include/asm/pbl_macros.h +++ b/arch/mips/include/asm/pbl_macros.h @@ -175,6 +175,7 @@ .set noreorder mips_disable_interrupts mips_disable_watchpoints + mips64_enable_64bit_addressing .set pop .endm -- 2.41.0
