On 23-07-06, Ahmad Fatoum wrote:
> If board code low level entry forgets to call imx8m*_early_clock_init
> before DRAM setup, write access to DRAM controller will seem to work,
> but the first read access will hang the system.
>
> Make debugging this board bring up mistake easier by adding a debug
> print along with a comment.
>
> Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
Reviewed-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx>
> ---
> drivers/ddr/imx8m/ddr_init.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/ddr/imx8m/ddr_init.c b/drivers/ddr/imx8m/ddr_init.c
> index 944cc3873e0c..9a86280d9c73 100644
> --- a/drivers/ddr/imx8m/ddr_init.c
> +++ b/drivers/ddr/imx8m/ddr_init.c
> @@ -106,7 +106,11 @@ int imx8m_ddr_init(struct dram_timing_info *dram_timing,
> reg32_write(DDRC_RFSHCTL3(0), 0x0000001);
> reg32_write(DDRC_PWRCTL(0), 0xa0);
>
> - /* if ddr type is LPDDR4, do it */
> + pr_debug("checking ddr type\n");
> + /*
> + * below is first read, so if boot hangs here, imx8m*_early_clock_init()
> + * might not have been called
> + */
> tmp = reg32_read(DDRC_MSTR(0));
> if (tmp & (0x1 << 5) && ddrc_type != DDRC_TYPE_MN)
> reg32_write(DDRC_DDR_SS_GPR0, 0x01); /* LPDDR4 mode */
> --
> 2.39.2
>
>
>
