Hi Sascha,
thanks for your feedback.
On 6/1/23 10:28, Sascha Hauer wrote:
On Thu, Jun 01, 2023 at 09:40:29AM +0200, Johannes Zink wrote:
Add basic support for Koenig+Bauer Alphajet, based on a Congatec QMX8MP
SoM with a i.MX8MP SoC in the Industrial Temperature Grade 4GB Variant,
no inline ECC used.
Co-Developed-by: Juergen Borleis <j.borleis@xxxxxxxxxxxxxx>
Signed-off-by: Juergen Borleis <j.borleis@xxxxxxxxxxxxxx>
Signed-off-by: Johannes Zink <j.zink@xxxxxxxxxxxxxx>
---
Koenig+Bauer Alphajet is based on the Congatec QMX8MP, which is an
i.MX8MP based SoC. Building barebox for this target requires the usual
bl31 and lpddr4 training data in /firmware as described in [1].
The Congatec SoM is strapped and fused to boot from QSPI NOR flash,
which can easily be updated using the registered barebox update handler.
[1] https://www.barebox.org/doc/latest/boards/imx/nxp-imx8mp-evk.html
Best regards
Johannes
---
Bootlog:
barebox 2023.05.0-00196-g24e000914af6-dirty #151 Thu Jun 1 09:36:02 CEST
2023
Board: Koenig+Bauer Alphajet
deep-probe: supported due to kb,alphajet
detected i.MX8MP revision 1.1
i.MX8MP unique ID: 3a13efb20002aaff
netconsole: registered as netconsole-1
psci psci.of: detected version 1.1
imx-esdhc 30b40000.mmc@xxxxxxxxxxx: registered as mmc0
mmc0: detected SD card version 2.0
mmc0: registered mmc0
imx-esdhc 30b60000.mmc@xxxxxxxxxxx: registered as mmc2
mmc2: detected MMC card version 5.1
mmc2: registered mmc2.boot0
mmc2: registered mmc2.boot1
mmc2: registered mmc2
mdio_bus: miibus0: probed
xHCI xHCI0: USB XHCI 1.10
state: New state registered 'state'
state: Using bucket 0@0x00000000
malloc space: 0xbfcfbe80 -> 0xffcfbe7f (size 1 GiB)
found force-builtin environment, using defaultenv
Hit m for menu or any to stop autoboot: 3
barebox@Koenig+Bauer Alphajet:/
Signed-off-by: Johannes Zink <j.zink@xxxxxxxxxxxxxx>
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/kb-imx8mp-alphajet/Makefile | 4 +
arch/arm/boards/kb-imx8mp-alphajet/board.c | 60 +
.../flash-header-imx8mp-cgtqx8p.imxcfg | 10 +
arch/arm/boards/kb-imx8mp-alphajet/lowlevel.c | 127 ++
arch/arm/boards/kb-imx8mp-alphajet/lpddr4-timing.c | 1832 ++++++++++++++++++++
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mp-cgtqx8p.dtsi | 1060 +++++++++++
arch/arm/dts/imx8mp-koenigbauer-alphajet.dts | 180 ++
arch/arm/mach-imx/Kconfig | 10 +
images/Makefile.imx | 5 +
11 files changed, 3290 insertions(+)
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 2877debad535..67b2fc07a395 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += nxp-imx8mq-evk/
obj-$(CONFIG_MACH_NXP_IMX8MM_EVK) += nxp-imx8mm-evk/
obj-$(CONFIG_MACH_NXP_IMX8MN_EVK) += nxp-imx8mn-evk/
obj-$(CONFIG_MACH_NXP_IMX8MP_EVK) += nxp-imx8mp-evk/
+obj-$(CONFIG_MACH_KB_ALPHAJET) += kb-imx8mp-alphajet/
obj-$(CONFIG_MACH_TQ_MBA8MPXL) += tqma8mpxl/
obj-$(CONFIG_MACH_OMAP343xSDP) += omap343xdsp/
obj-$(CONFIG_MACH_OMAP3EVM) += omap3evm/
diff --git a/arch/arm/boards/kb-imx8mp-alphajet/Makefile b/arch/arm/boards/kb-imx8mp-alphajet/Makefile
new file mode 100644
index 000000000000..b3ae72be3e3b
--- /dev/null
+++ b/arch/arm/boards/kb-imx8mp-alphajet/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += board.o
+lwl-y += lowlevel.o lpddr4-timing.o
diff --git a/arch/arm/boards/kb-imx8mp-alphajet/board.c b/arch/arm/boards/kb-imx8mp-alphajet/board.c
new file mode 100644
index 000000000000..78cc60e2c3b1
--- /dev/null
+++ b/arch/arm/boards/kb-imx8mp-alphajet/board.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: 2023 Juergen Borleis, Pengutronix
+// SPDX-FileCopyrightText: 2023 Johannes Zink, Pengutronix
+
+#include <asm/memory.h>
+#include <bootsource.h>
+#include <common.h>
+#include <deep-probe.h>
+#include <init.h>
+#include <linux/phy.h>
+#include <linux/sizes.h>
+#include <mach/imx/bbu.h>
+#include <mach/imx/generic.h>
+#include <mach/imx/iomux-mx8mp.h>
+#include <gpio.h>
+#include <envfs.h>
+
+#define EQOS_PWR_PIN IMX_GPIO_NR(1, 5) /* ENET_PWREN# */
+static void setup_ethernet_phy(void)
+{
+ u32 val;
+
+ of_device_ensure_probed_by_alias("gpio0");
+
+ if (gpio_direction_output(EQOS_PWR_PIN, 0))
+ {
+ pr_err("eqos phy power: failed to request pin\n");
+ return;
+ }
Should this be a fixed regulator in dt?
Phy regulator handling in linux is broken for the mx8 eqos, as the
phy-regulators are not handed down properly, which is why I cannot add it in
the linux upstream dts (dts upstreaming is still to be done...).
I decided to use a hog there. As Marco gave me a hint that hogs are currently
somewhat broken in barebox, I opted for setting the pin manually in the board code.
Johannes
Sascha
--
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