On 31.05.23 14:38, Sascha Hauer wrote: > On Wed, May 31, 2023 at 01:58:33PM +0200, Ahmad Fatoum wrote: >>> From b6e5c92682467496bd9c57918996f1feffda2dd6 Mon Sep 17 00:00:00 2001 >>> From: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> >>> Date: Wed, 31 May 2023 11:58:51 +0200 >>> Subject: [PATCH] ARM: mmu_32: fix setting up zero page when it is in SDRAM >>> >>> We used to skip setting the zero page to faulting when SDRAM starts at >>> 0x0. As bootm code now explicitly sets the zero page accessible before >>> copying ATAGs there this should no longer be necessary, so >>> unconditionally set the zero page to faulting during MMU startup. This >>> also moves the zero page and vector table setup after the point the >>> SDRAM has been mapped cachable, because otherwise the zero page and >>> possibly the vector table mapping would be overwritten. >>> >>> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> >>> --- >>> arch/arm/cpu/mmu_32.c | 23 +++++++++-------------- >>> 1 file changed, 9 insertions(+), 14 deletions(-) >>> >>> diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c >>> index c4e5a3bb0a..14775768a3 100644 >>> --- a/arch/arm/cpu/mmu_32.c >>> +++ b/arch/arm/cpu/mmu_32.c >>> @@ -461,19 +461,14 @@ static int set_vector_table(unsigned long adr) >>> >>> static void create_zero_page(void) >> >> Is this commit incomplete? Vectors should be set up unconditionally and >> create_zero_page should be called after it. > > Vectors are set up unconditionally and create_zero_page() is called the > same way as before. So zero page is requested first and then on platforms with vector at address 0 requesting fails and we are left without configured IVT? > > Sascha > >> >>> { >>> - struct resource *zero_sdram; >>> + /* >>> + * In case the zero page is in SDRAM request it to prevent others >>> + * from using it >>> + */ >>> + request_sdram_region("zero page", 0x0, PAGE_SIZE); >>> >>> - zero_sdram = request_sdram_region("zero page", 0x0, PAGE_SIZE); >>> - if (zero_sdram) { >>> - /* >>> - * Here we would need to set the second level page table >>> - * entry to faulting. This is not yet implemented. >>> - */ >>> - pr_debug("zero page is in SDRAM area, currently not supported\n"); >>> - } else { >>> - zero_page_faulting(); >>> - pr_debug("Created zero page\n"); >>> - } >>> + zero_page_faulting(); >>> + pr_debug("Created zero page\n"); >>> } >>> >>> /* >>> @@ -530,8 +525,6 @@ void __mmu_init(bool mmu_on) >>> >>> pr_debug("ttb: 0x%p\n", ttb); >>> >>> - vectors_init(); >>> - >>> /* >>> * Early mmu init will have mapped everything but the initial memory area >>> * (excluding final OPTEE_SIZE bytes) uncached. We have now discovered >>> @@ -552,6 +545,8 @@ void __mmu_init(bool mmu_on) >>> >>> remap_range((void *)pos, bank->start + bank->size - pos, MAP_CACHED); >>> } >>> + >>> + vectors_init(); >>> } >>> >>> /* >> >> -- >> Pengutronix e.K. | | >> Steuerwalder Str. 21 | http://www.pengutronix.de/ | >> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | >> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | >> >> > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |