With increased number of i.MX8M-based designs, boards now tend to come
with PMIC that are preconfigured to supply the correct voltages at POR.
On such boards, barebox need not do any I2C configuration, but clocks
need to be configured anyway, which is usually done as part of the I2C
setup in the board's power_init_board. To save developers copy-pasting
code the hassle of debugging DDR training only to find out they
shouldn't have deleted imx8m*_early_clock_init() when they removed
power_init_board(), let's move it out of this function.
This means we now setup clocks before pinmuxing I2C, but still, this
should not result in any functional change.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c | 3 ++-
arch/arm/boards/nxp-imx8mm-evk/lowlevel.c | 2 +-
arch/arm/boards/nxp-imx8mn-evk/lowlevel.c | 3 ++-
arch/arm/boards/nxp-imx8mp-evk/lowlevel.c | 3 ++-
arch/arm/boards/polyhex-debix/lowlevel.c | 3 ++-
arch/arm/boards/tqma8mpxl/lowlevel.c | 3 ++-
arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c | 3 ++-
7 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
index 2f6061f0e263..cf7f744552b2 100644
--- a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
+++ b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
@@ -64,7 +64,6 @@ void innocomm_wb15_power_init_board(void)
imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL);
imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA);
- imx8mm_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR));
@@ -87,6 +86,8 @@ ENTRY_FUNCTION(start_innocomm_wb15_evk, r0, r1, r2)
* will then jump to DRAM in EL2
*/
if (current_el() == 3) {
+ imx8mm_early_clock_init();
+
innocomm_wb15_power_init_board();
imx8mm_ddr_init(&innocomm_wb15_dram_timing, DRAM_TYPE_LPDDR4);
diff --git a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c
index ee18fe72b40e..881d8285b60e 100644
--- a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c
@@ -83,7 +83,6 @@ static void power_init_board(void)
imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL);
imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA);
- imx8mm_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR));
@@ -106,6 +105,7 @@ static void start_atf(void)
if (current_el() != 3)
return;
+ imx8mm_early_clock_init();
power_init_board();
imx8mm_ddr_init(&imx8mm_evk_dram_timing, DRAM_TYPE_LPDDR4);
diff --git a/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c
index 23504ee96551..a1a501b1d962 100644
--- a/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c
@@ -92,10 +92,11 @@ static void start_atf(void)
if (current_el() != 3)
return;
+ imx8mn_early_clock_init();
+
imx8mn_setup_pad(IMX8MN_PAD_I2C1_SCL__I2C1_SCL);
imx8mn_setup_pad(IMX8MN_PAD_I2C1_SDA__I2C1_SDA);
- imx8mn_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MN_I2C1_BASE_ADDR));
diff --git a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c
index c129b5e7fa43..969947d2ec4e 100644
--- a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c
@@ -78,7 +78,6 @@ static void power_init_board(void)
imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL);
imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL);
- imx8mp_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR));
@@ -98,6 +97,8 @@ static void start_atf(void)
if (current_el() != 3)
return;
+ imx8mp_early_clock_init();
+
power_init_board();
imx8mp_ddr_init(&imx8mp_evk_dram_timing, DRAM_TYPE_LPDDR4);
diff --git a/arch/arm/boards/polyhex-debix/lowlevel.c b/arch/arm/boards/polyhex-debix/lowlevel.c
index 1c8be39559f7..c4feb30108c8 100644
--- a/arch/arm/boards/polyhex-debix/lowlevel.c
+++ b/arch/arm/boards/polyhex-debix/lowlevel.c
@@ -73,7 +73,6 @@ static void power_init_board(void)
imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL);
imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL);
- imx8mp_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR));
@@ -93,6 +92,8 @@ static void start_atf(void)
if (current_el() != 3)
return;
+ imx8mp_early_clock_init();
+
power_init_board();
imx8mp_ddr_init(&imx8mp_debix_dram_timing, DRAM_TYPE_LPDDR4);
diff --git a/arch/arm/boards/tqma8mpxl/lowlevel.c b/arch/arm/boards/tqma8mpxl/lowlevel.c
index 793bcba3ca36..e0a0f17d3aa4 100644
--- a/arch/arm/boards/tqma8mpxl/lowlevel.c
+++ b/arch/arm/boards/tqma8mpxl/lowlevel.c
@@ -74,7 +74,6 @@ static void power_init_board(void)
imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL);
imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL);
- imx8mp_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR));
@@ -91,6 +90,8 @@ static __noreturn noinline void tqma8mpxl_start(void)
if (current_el() == 3) {
extern struct dram_timing_info dram_timing_2gb_no_ecc;
+ imx8mp_early_clock_init();
+
power_init_board();
imx8mp_ddr_init(&dram_timing_2gb_no_ecc, DRAM_TYPE_LPDDR4);
diff --git a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c
index 92325fd20e29..c9907ebf0a35 100644
--- a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c
+++ b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c
@@ -70,7 +70,6 @@ static void power_init_board(void)
imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL);
imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL);
- imx8mm_early_clock_init();
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1);
i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR));
@@ -90,6 +89,8 @@ static void start_atf(void)
if (current_el() != 3)
return;
+ imx8mm_early_clock_init();
+
power_init_board();
imx8mp_ddr_init(&var_dart_imx8mp_dram_timing, DRAM_TYPE_LPDDR4);
--
2.39.2
