On 12.05.23 13:09, Sascha Hauer wrote:
> We need a call to arm_set_cache_functions() before the cache maintenance
> functions can be used. Drop this call and just pick the correct
> functions on the first call.
>
> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Reviewed-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
> ---
> arch/arm/cpu/cache.c | 83 +++++++++++++++++-------------------
> arch/arm/cpu/cache_64.c | 5 ---
> arch/arm/cpu/mmu-early.c | 2 -
> arch/arm/cpu/mmu.c | 2 -
> arch/arm/cpu/start.c | 4 +-
> arch/arm/include/asm/cache.h | 2 -
> 6 files changed, 41 insertions(+), 57 deletions(-)
>
> diff --git a/arch/arm/cpu/cache.c b/arch/arm/cpu/cache.c
> index 24a02c68f3..4202406d0d 100644
> --- a/arch/arm/cpu/cache.c
> +++ b/arch/arm/cpu/cache.c
> @@ -17,8 +17,6 @@ struct cache_fns {
> void (*mmu_cache_flush)(void);
> };
>
> -struct cache_fns *cache_fns;
> -
> #define DEFINE_CPU_FNS(arch) \
> void arch##_dma_clean_range(unsigned long start, unsigned long end); \
> void arch##_dma_flush_range(unsigned long start, unsigned long end); \
> @@ -41,50 +39,13 @@ DEFINE_CPU_FNS(v5)
> DEFINE_CPU_FNS(v6)
> DEFINE_CPU_FNS(v7)
>
> -void __dma_clean_range(unsigned long start, unsigned long end)
> -{
> - if (cache_fns)
> - cache_fns->dma_clean_range(start, end);
> -}
> -
> -void __dma_flush_range(unsigned long start, unsigned long end)
> -{
> - if (cache_fns)
> - cache_fns->dma_flush_range(start, end);
> -}
> -
> -void __dma_inv_range(unsigned long start, unsigned long end)
> -{
> - if (cache_fns)
> - cache_fns->dma_inv_range(start, end);
> -}
> -
> -#ifdef CONFIG_MMU
> -
> -void __mmu_cache_on(void)
> -{
> - if (cache_fns)
> - cache_fns->mmu_cache_on();
> -}
> -
> -void __mmu_cache_off(void)
> +static struct cache_fns *cache_functions(void)
> {
> - if (cache_fns)
> - cache_fns->mmu_cache_off();
> -}
> + static struct cache_fns *cache_fns;
>
> -void __mmu_cache_flush(void)
> -{
> if (cache_fns)
> - cache_fns->mmu_cache_flush();
> - if (outer_cache.flush_all)
> - outer_cache.flush_all();
> -}
> -
> -#endif
> + return cache_fns;
>
> -int arm_set_cache_functions(void)
> -{
> switch (cpu_architecture()) {
> #ifdef CONFIG_CPU_32v4T
> case CPU_ARCH_ARMv4T:
> @@ -113,9 +74,45 @@ int arm_set_cache_functions(void)
> while(1);
> }
>
> - return 0;
> + return cache_fns;
> +}
> +
> +void __dma_clean_range(unsigned long start, unsigned long end)
> +{
> + cache_functions()->dma_clean_range(start, end);
> +}
> +
> +void __dma_flush_range(unsigned long start, unsigned long end)
> +{
> + cache_functions()->dma_flush_range(start, end);
> +}
> +
> +void __dma_inv_range(unsigned long start, unsigned long end)
> +{
> + cache_functions()->dma_inv_range(start, end);
> +}
> +
> +#ifdef CONFIG_MMU
> +
> +void __mmu_cache_on(void)
> +{
> + cache_functions()->mmu_cache_on();
> +}
> +
> +void __mmu_cache_off(void)
> +{
> + cache_functions()->mmu_cache_off();
> }
>
> +void __mmu_cache_flush(void)
> +{
> + cache_functions()->mmu_cache_flush();
> + if (outer_cache.flush_all)
> + outer_cache.flush_all();
> +}
> +
> +#endif
> +
> /*
> * Early function to flush the caches. This is for use when the
> * C environment is not yet fully initialized.
> diff --git a/arch/arm/cpu/cache_64.c b/arch/arm/cpu/cache_64.c
> index cb7bc0945c..3a30296128 100644
> --- a/arch/arm/cpu/cache_64.c
> +++ b/arch/arm/cpu/cache_64.c
> @@ -6,11 +6,6 @@
> #include <asm/cache.h>
> #include <asm/system_info.h>
>
> -int arm_set_cache_functions(void)
> -{
> - return 0;
> -}
> -
> /*
> * Early function to flush the caches. This is for use when the
> * C environment is not yet fully initialized.
> diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c
> index 0d528b9b9c..4895911cdb 100644
> --- a/arch/arm/cpu/mmu-early.c
> +++ b/arch/arm/cpu/mmu-early.c
> @@ -28,8 +28,6 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize,
> {
> ttb = (uint32_t *)_ttb;
>
> - arm_set_cache_functions();
> -
> set_ttbr(ttb);
>
> /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */
> diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
> index 6388e1bf14..78dd05577a 100644
> --- a/arch/arm/cpu/mmu.c
> +++ b/arch/arm/cpu/mmu.c
> @@ -414,8 +414,6 @@ void __mmu_init(bool mmu_on)
> {
> struct memory_bank *bank;
>
> - arm_set_cache_functions();
> -
> if (cpu_architecture() >= CPU_ARCH_ARMv7) {
> pte_flags_cached = PTE_FLAGS_CACHED_V7;
> pte_flags_wc = PTE_FLAGS_WC_V7;
> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> index be303514c2..bcfc630f3b 100644
> --- a/arch/arm/cpu/start.c
> +++ b/arch/arm/cpu/start.c
> @@ -170,9 +170,7 @@ __noreturn __no_sanitize_address void barebox_non_pbl_start(unsigned long membas
> if (IS_ENABLED(CONFIG_MMU_EARLY)) {
> unsigned long ttb = arm_mem_ttb(membase, endmem);
>
> - if (IS_ENABLED(CONFIG_PBL_IMAGE)) {
> - arm_set_cache_functions();
> - } else {
> + if (!IS_ENABLED(CONFIG_PBL_IMAGE)) {
> pr_debug("enabling MMU, ttb @ 0x%08lx\n", ttb);
> arm_early_mmu_cache_invalidate();
> mmu_early_enable(membase, memsize - OPTEE_SIZE, ttb);
> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
> index b63776a74a..261c30129a 100644
> --- a/arch/arm/include/asm/cache.h
> +++ b/arch/arm/include/asm/cache.h
> @@ -18,8 +18,6 @@ static inline void icache_invalidate(void)
> #endif
> }
>
> -int arm_set_cache_functions(void);
> -
> void arm_early_mmu_cache_flush(void);
> void arm_early_mmu_cache_invalidate(void);
>
--
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