On Mon, Apr 10, 2023 at 02:58:08PM +0000, Renaud Barbier wrote: > It was noticed that the LS1021A-IOT was slow to boot and perform > computing intensive operations. Enable SMP so the cortex-a7 cache > works as expected. > > Signed-off-by: Renaud Barbier mailto:renaud.barbier@xxxxxxxxxx > --- > arch/arm/boards/ls1021aiot/lowlevel.c | 1 - > arch/arm/mach-layerscape/lowlevel-ls102xa.c | 4 ++++ > 2 files changed, 4 insertions(+), 1 deletion(-) Applied, thanks Sascha > > diff --git a/arch/arm/boards/ls1021aiot/lowlevel.c b/arch/arm/boards/ls1021aiot/lowlevel.c > index 4dec451558..b7106887f2 100644 > --- a/arch/arm/boards/ls1021aiot/lowlevel.c > +++ b/arch/arm/boards/ls1021aiot/lowlevel.c > @@ -86,7 +86,6 @@ static noinline __noreturn void ls1021aiot_r_entry(void) > __dtb_fsl_ls1021a_iot_start); > } > > - arm_cpu_lowlevel_init(); > ls102xa_init_lowlevel(); > ls102xa_debug_ll_init(); > > diff --git a/arch/arm/mach-layerscape/lowlevel-ls102xa.c b/arch/arm/mach-layerscape/lowlevel-ls102xa.c > index 7f4fcdf55c..259d8866d5 100644 > --- a/arch/arm/mach-layerscape/lowlevel-ls102xa.c > +++ b/arch/arm/mach-layerscape/lowlevel-ls102xa.c > @@ -6,6 +6,7 @@ > #include <common.h> > #include <io.h> > #include <clock.h> > +#include <asm/barebox-arm-head.h> > #include <asm/syscounter.h> > #include <asm/system.h> > #include <mach/layerscape/errata.h> > @@ -311,6 +312,9 @@ void ls102xa_init_lowlevel(void) > uint32_t state, major, ctrl, freq; > uint64_t val; > > + cortex_a7_lowlevel_init(); > + arm_cpu_lowlevel_init(); > + > init_csu(); > > writel(SYS_COUNTER_CTRL_ENABLE, LSCH2_SYS_COUNTER_ADDR); > -- > 2.34.1 > > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
