Hi Alexander.
On Tue, Mar 21, 2023 at 10:44:25AM +0100, Alexander Dahl wrote:
> Hello Sascha,
>
> Am Tue, Mar 21, 2023 at 09:58:48AM +0100 schrieb Sascha Hauer:
> > Hi Wolfram,
> >
> > Nice to hear from you here ;)
> >
> > On Sun, Mar 19, 2023 at 10:28:07PM +0100, Wolfram Sang wrote:
> > > Hi Sam,
> > >
> > > > It is only a few weeks ago I argued that there was no users of the older
> > > > at91sam* boards, and then you prove me wrong here.
> > >
> > > At your service ;)
> > >
> > > > I will try to remember that you may be able to test should someone
> > > > decide to move the barebox support for qil_a9g20 to DT and add PBL
> > > > support in the process.
> > >
> > > I am still new to at91 and barebox, but AFAICS the PBL support is only
> > > for MCI currently?
> >
> > As of 4e410f3e68280 PBL is always used on AT91.
> >
> > I have no idea how the SDRAM setup is done on the USB-A9G20. There seems
> > to be SDRAM setup code for the USB-A9263, but not for the USB-A9G20. Is
> > there some AT91Bootstrap required?
>
> I can not speak for this particular board, but for others with the
> same SoC (AT91SAM9G20). The vendor approach is to setup the SDRAM
> (and maybe more) in at91bootstrap, however those old SoCs are not
> supported in recent version 4.x of that anymore, 3.x should work, I
> never tried that for sam9g20 (we still use 1.x for those SoCs).
> at91bootstrap then usually loads U-Boot from flash to SDRAM and starts
> U-Boot.
>
> You can do the same init in U-Boot SPL as well without the "real"
> at91bootstrap, I think I saw that for other boards with similar SoCs.
> And from what I saw here, barebox has the concept of multiple stages
> as well, right? So SDRAM must be initialized there in the very first
> stage after ROM code running from (tiny) internal SRAM, equivalent to
> what at91bootstrap does, before relocating to SDRAM. There's no magic
> thing the ROM code can do for you on that platform.
When I added support to skov-arm9cpu to use barebox as replacement for
at91bootstrap the sdram init looked like this [1]:
static void sam9263_sdramc_init(unsigned int mck)
{
+ const struct at91sam9_sdramc_config config =
+ {
+ .sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0),
+ .mr = 0,
+ .tr = (mck * 7) / 1000000, // TODO 140 versus 0x13c (316)?
+ .cr = AT91_SDRAMC_NC_10 | AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_2
+ | AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32
+ | AT91_SDRAMC_TWR_2 | AT91_SDRAMC_TRC_7
+ | AT91_SDRAMC_TRP_2 | AT91_SDRAMC_TRCD_2
+ | AT91_SDRAMC_TRAS_5 | AT91_SDRAMC_TXSR_8,
+ .lpr = 0,
+ .mdr = AT91_SDRAMC_MD_SDRAM,
+ };
+
+ /* Define PDC[31:16] as DATA[31:16] */
+ at91_mux_gpio_disable(IOMEM(AT91SAM9263_BASE_PIOD), 0xffff0000);
+ /* No pull-up for D[31:16] */
+ at91_mux_set_pullup(IOMEM(AT91SAM9263_BASE_PIOD), 0xffff0000, true);
+ /* PD16 to PD31 are pheripheral A */
+ at91_mux_set_A_periph(IOMEM(AT91SAM9263_BASE_PIOD), 0xffff0000);
}
On my too long todo list is to complete this work and upstream this for
both this and the at91sam9263ek board.
Anyway - DT support is the first step. Replacing at91bootstrap can
always come later.
[1] https://lore.barebox.org/barebox/20220628203849.2785611-1-sam@xxxxxxxxxxxx/
Sam
