In rockchip_clk_register_pll() the number of parent_names is passed in
num_parents. Do not access parent_names[1] when the array is not big
enough.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
drivers/clk/rockchip/clk-pll.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index fdbb016e7f..a45a445de6 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -853,7 +853,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
struct rockchip_pll_rate_table *rate_table,
unsigned long flags, u8 clk_pll_flags)
{
- const char *pll_parents[3];
+ const char *pll_parents[3] = {};
struct clk_init_data init;
struct rockchip_clk_pll *pll;
struct clk_mux *pll_mux;
@@ -895,7 +895,8 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
/* the actual muxing is xin24m, pll-output, xin32k */
pll_parents[0] = parent_names[0];
pll_parents[1] = pll_name;
- pll_parents[2] = parent_names[1];
+ if (num_parents > 1)
+ pll_parents[2] = parent_names[1];
init.name = name;
init.flags = CLK_SET_RATE_PARENT;
--
2.30.2
