This adds the FlexSPI/QSPI update handler to be able to write the common barebox image to the QSPI. Signed-off-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx> --- arch/arm/boards/nxp-imx8mm-evk/board.c | 1 + arch/arm/boards/nxp-imx8mn-evk/board.c | 1 + arch/arm/boards/nxp-imx8mp-evk/board.c | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/arm/boards/nxp-imx8mm-evk/board.c b/arch/arm/boards/nxp-imx8mm-evk/board.c index fd748262f7..c8e17570ca 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/board.c +++ b/arch/arm/boards/nxp-imx8mm-evk/board.c @@ -53,6 +53,7 @@ static int imx8mm_evk_probe(struct device *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); diff --git a/arch/arm/boards/nxp-imx8mn-evk/board.c b/arch/arm/boards/nxp-imx8mn-evk/board.c index 13efc62a58..3e90ba284c 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/board.c +++ b/arch/arm/boards/nxp-imx8mn-evk/board.c @@ -51,6 +51,7 @@ static int imx8mn_evk_probe(struct device *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); diff --git a/arch/arm/boards/nxp-imx8mp-evk/board.c b/arch/arm/boards/nxp-imx8mp-evk/board.c index 0c9fe7835b..2aa551e504 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/board.c +++ b/arch/arm/boards/nxp-imx8mp-evk/board.c @@ -36,6 +36,7 @@ static int nxp_imx8mp_evk_probe(struct device *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); /* Enable RGMII TX clk output */ val = readl(MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); -- 2.30.2