The Rockchip UART is ns16550 compatible, so use the existing helper
functions to provide debug_ll functionality. While at it rename
INIT_LL() to be Rockchip specific.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
arch/arm/boards/phytec-som-rk3288/lowlevel.c | 2 +-
include/mach/rockchip/debug_ll.h | 74 +++++++-------------
2 files changed, 27 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boards/phytec-som-rk3288/lowlevel.c b/arch/arm/boards/phytec-som-rk3288/lowlevel.c
index dc29113c39..8fc8f700f9 100644
--- a/arch/arm/boards/phytec-som-rk3288/lowlevel.c
+++ b/arch/arm/boards/phytec-som-rk3288/lowlevel.c
@@ -26,7 +26,7 @@ ENTRY_FUNCTION(start_rk3288_phycore_som, r0, r1, r2)
GPIO7C6_MASK << GPIO7C6_SHIFT,
GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
- INIT_LL();
+ rockchip_debug_ll_init();
}
fdt = __dtb_rk3288_phycore_som_start + get_runtime_offset();
diff --git a/include/mach/rockchip/debug_ll.h b/include/mach/rockchip/debug_ll.h
index c859c3f199..a4b203794f 100644
--- a/include/mach/rockchip/debug_ll.h
+++ b/include/mach/rockchip/debug_ll.h
@@ -14,84 +14,62 @@
#ifdef CONFIG_DEBUG_ROCKCHIP_RK3188_UART
-#define UART_CLOCK 100000000
+#define RK_DEBUG_UART_CLOCK 100000000
#define RK_DEBUG_SOC RK3188
-#define serial_out(a, v) writeb(v, a)
-#define serial_in(a) readb(a)
#elif defined CONFIG_DEBUG_ROCKCHIP_RK3288_UART
-#define UART_CLOCK 24000000
+#define RK_DEBUG_UART_CLOCK 24000000
#define RK_DEBUG_SOC RK3288
-#define serial_out(a, v) writel(v, a)
-#define serial_in(a) readl(a)
#elif defined CONFIG_DEBUG_ROCKCHIP_RK3568_UART
-#define UART_CLOCK 24000000
+#define RK_DEBUG_UART_CLOCK 24000000
#define RK_DEBUG_SOC RK3568
-#define serial_out(a, v) writel(v, a)
-#define serial_in(a) readl(a)
#elif defined CONFIG_DEBUG_ROCKCHIP_RK3399_UART
-#define UART_CLOCK 24000000
+#define RK_DEBUG_UART_CLOCK 24000000
#define RK_DEBUG_SOC RK3399
-#define serial_out(a, v) writel(v, a)
-#define serial_in(a) readl(a)
#endif
#define __RK_UART_BASE(soc, num) soc##_UART##num##_BASE
#define RK_UART_BASE(soc, num) __RK_UART_BASE(soc, num)
-#define LSR_THRE 0x20 /* Xmit holding register empty */
-#define LCR_BKSE 0x80 /* Bank select enable */
-#define LSR (5 << 2)
-#define THR (0 << 2)
-#define DLL (0 << 2)
-#define IER (1 << 2)
-#define DLM (1 << 2)
-#define FCR (2 << 2)
-#define LCR (3 << 2)
-#define MCR (4 << 2)
-#define MDR (8 << 2)
-
-static inline void INIT_LL(void)
+static inline uint8_t debug_ll_read_reg(int reg)
{
void __iomem *base = IOMEM(RK_UART_BASE(RK_DEBUG_SOC,
CONFIG_DEBUG_ROCKCHIP_UART_PORT));
- unsigned int divisor = DIV_ROUND_CLOSEST(UART_CLOCK,
- 16 * CONFIG_BAUDRATE);
-
- serial_out(base + LCR, 0x00);
- serial_out(base + IER, 0x00);
- serial_out(base + MDR, 0x07);
- serial_out(base + LCR, LCR_BKSE);
- serial_out(base + DLL, divisor & 0xff);
- serial_out(base + DLM, divisor >> 8);
- serial_out(base + LCR, 0x03);
- serial_out(base + MCR, 0x03);
- serial_out(base + FCR, 0x07);
- serial_out(base + MDR, 0x00);
+
+ return readb(base + (reg << 2));
}
-static inline void PUTC_LL(char c)
+static inline void debug_ll_write_reg(int reg, uint8_t val)
{
void __iomem *base = IOMEM(RK_UART_BASE(RK_DEBUG_SOC,
CONFIG_DEBUG_ROCKCHIP_UART_PORT));
- /* Wait until there is space in the FIFO */
- while ((serial_in(base + LSR) & LSR_THRE) == 0)
- ;
- /* Send the character */
- serial_out(base + THR, c);
- /* Wait to make sure it hits the line, in case we die too soon. */
- while ((serial_in(base + LSR) & LSR_THRE) == 0)
- ;
+ writeb(val, base + (reg << 2));
+}
+
+#include <debug_ll/ns16550.h>
+
+static inline void rockchip_debug_ll_init(void)
+{
+ unsigned int divisor;
+
+ divisor = debug_ll_ns16550_calc_divisor(RK_DEBUG_UART_CLOCK * 2);
+ debug_ll_ns16550_init(divisor);
}
+
+static inline void PUTC_LL(int c)
+{
+ debug_ll_ns16550_putc(c);
+}
+
#else
-static inline void INIT_LL(void)
+static inline void rockchip_debug_ll_init(void)
{
}
#endif
--
2.30.2
