On Mon, Feb 06, 2023 at 10:00:02PM +0100, Lucas Stach wrote:
> Limit detected early memory size to 1GB on i.MX8MP, as the default DT
> has a reserved memory region at 0x92400000, which will conflict with
> our malloc area in some configurations. Until we can properly parse
> and exclude the reserved memory regions in the PBL, just avoid getting
> near that DRAM address by limiting the detected size.
The memory region reserved at 0x92400000 belongs to an audio processing
DSP. This is unused for sure in barebox, so do we really need to handle
this case here?
Besides, who had that glorious of hardcoding that RAM area in the dtsi
file?? Is this address dictated by the hardware? That would mean the DSP
is not usable on machines with only 1GiB of RAM. If it's not dictated
by the hardware, why is it in the dtsi file?
This smells fishy.
Sascha
>
> Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> arch/arm/mach-imx/esdctl.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
> index a704250297bb..043de477a77d 100644
> --- a/arch/arm/mach-imx/esdctl.c
> +++ b/arch/arm/mach-imx/esdctl.c
> @@ -947,7 +947,17 @@ void __noreturn imx8mn_barebox_entry(void *boarddata)
>
> void __noreturn imx8mp_barebox_entry(void *boarddata)
> {
> - imx8m_barebox_entry(boarddata, 32);
> + /*
> + * Limit detected early memory size to 1GB on i.MX8MP, as the default
> + * DT has a reserved memory region at 0x92400000, which will conflict
> + * with our malloc area in some configurations. Until we can properly
> + * parse and exclude the reserved memory regions in the PBL, just avoid
> + * getting near that DRAM address by limiting the detected size.
> + */
> + barebox_arm_entry(MX8M_DDR_CSD1_BASE_ADDR,
> + min_t(resource_size_t, SZ_1G,
> + imx8m_barebox_earlymem_size(32)),
> + boarddata);
> }
>
> void __noreturn imx8mq_barebox_entry(void *boarddata)
> --
> 2.39.1
>
>
>
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