The phy setup done in the board code is done by the phy driver already,
so drop the board code.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
arch/arm/boards/embest-riotboard/board.c | 35 ------------------------
arch/arm/mach-imx/Kconfig | 1 +
2 files changed, 1 insertion(+), 35 deletions(-)
diff --git a/arch/arm/boards/embest-riotboard/board.c b/arch/arm/boards/embest-riotboard/board.c
index c5162d2b06..cd912f79e5 100644
--- a/arch/arm/boards/embest-riotboard/board.c
+++ b/arch/arm/boards/embest-riotboard/board.c
@@ -19,43 +19,8 @@
#include <linux/phy.h>
#include <deep-probe.h>
-static int ar8035_phy_fixup(struct phy_device *dev)
-{
- u16 val;
-
- /* Ar803x phy SmartEEE feature cause link status generates glitch,
- * which cause ethernet link down/up issue, so disable SmartEEE
- */
- phy_write(dev, 0xd, 0x3);
- phy_write(dev, 0xe, 0x805d);
- phy_write(dev, 0xd, 0x4003);
-
- val = phy_read(dev, 0xe);
- phy_write(dev, 0xe, val & ~(1 << 8));
-
- /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
- phy_write(dev, 0xd, 0x7);
- phy_write(dev, 0xe, 0x8016);
- phy_write(dev, 0xd, 0x4007);
-
- val = phy_read(dev, 0xe);
- val &= 0xffe3;
- val |= 0x18;
- phy_write(dev, 0xe, val);
-
- /* introduce tx clock delay */
- phy_write(dev, 0x1d, 0x5);
- val = phy_read(dev, 0x1e);
- val |= 0x0100;
- phy_write(dev, 0x1e, val);
-
- return 0;
-}
-
static int riotboard_probe(struct device *dev)
{
- phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup);
-
imx6_bbu_internal_mmc_register_handler("emmc", "/dev/mmc3.barebox",
BBU_HANDLER_FLAG_DEFAULT);
imx6_bbu_internal_mmc_register_handler("sd", "/dev/mmc2", 0);
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index dce5d9e1bb..2092b0b000 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -467,6 +467,7 @@ config MACH_EMBEST_MARSBOARD
config MACH_EMBEST_RIOTBOARD
bool "Embest RIoTboard"
select ARCH_IMX6
+ imply AT803X_PHY
config MACH_UDOO
bool "Freescale i.MX6 UDOO Board"
--
2.30.2
