When adding a new board with a yet unsupported DDR frequency, PLL
configuration is silently skipped, leading to a later hang during DDRC
configuration. Improve the bring up user experience by printing a
warning in that case. The user is then expected to extend
imx8mm_fracpll_table, so PBL knows how PLLs should be configured for
this new frequency.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
drivers/ddr/imx8m/ddrphy_utils.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ddr/imx8m/ddrphy_utils.c b/drivers/ddr/imx8m/ddrphy_utils.c
index c5d94e305086..3e03d4b75c9e 100644
--- a/drivers/ddr/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx8m/ddrphy_utils.c
@@ -344,6 +344,7 @@ void ddrphy_init_set_dfi_clk(unsigned int drate_mhz, enum ddrc_type type)
case 400: drate = DDR_400; break;
case 100: drate = DDR_100; break;
default:
+ pr_warn("Unsupported frequency %u\n", drate_mhz);
return;
}
--
2.30.2
