Setting BIT(1) in the ARRIA10_SYSMGR_NOC_ADDR_REMAP_VALUE results in mapping the OCRAM to 0x0, at least for the CPU. Peripherals doing DMA like the SDMMC controller see the SDRAM instead. Linux happens to use this low memory for DMA sometimes and things explode nicely at that point. Clear the OCRAM mapping so that both the CPU and DMA controllers access SDRAM. Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- arch/arm/mach-socfpga/arria10-init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/arria10-init.c b/arch/arm/mach-socfpga/arria10-init.c index 2fa44c21c5..93bc3368d3 100644 --- a/arch/arm/mach-socfpga/arria10-init.c +++ b/arch/arm/mach-socfpga/arria10-init.c @@ -174,7 +174,7 @@ void arria10_init(struct arria10_mainpll_cfg *mainpll, * Enable address filtering (Bit[0]) */ writel(0x00000001, ARRIA10_MPUL2_ADRFLTR_START); - writel(0x00000002, ARRIA10_SYSMGR_NOC_ADDR_REMAP_VALUE); + writel(0x00000000, ARRIA10_SYSMGR_NOC_ADDR_REMAP_VALUE); arria10_reset_peripherals(); -- 2.30.2
