Hello Enrico, On 04.10.22 18:23, Enrico Scholz wrote: > Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> writes: > >> TLSF currently uses only 4-byte alignment on 32-bit platforms, which isn't >> enough for ldrd/strd on ARMv7. This series reworks TLSF a bit, so we always >> have at least 8 byte alignment. dlmalloc already has 8 byte alignment >> minimum, so nothing to do there. > > I am wondering whether alignment should be increased on 64 bit archs to > 16 bytes as well. ARMv8 spec [1] says > > | exclusive pair access must be aligned to twice the data size, that is, > | 128 bits for a pair of 64-bit values. > > A github issue [2] mentions this alignment too. Your quote is addressing exclusive pair access, which I think is something a compiler would generate for lock-free __int128 access, not something that we should encounter in barebox. But yes, I believe we should have 16-byte alignment on 64-bit systems with TLSF as we already do with dlmalloc, if only to be on the safe side. This is unfortunately more complicated than what this PR does with 32-bit, so I am leaving that as future exercise (or until we have a real world example where this is required in barebox). >> While this fixes real issues like what Enrico ran into, I'd suggest we only >> this be taken into next only after v2022.10.0 is tagged, > > This is ok for me; the issue disappeared with reverting the zstd patch. Feel free to give it a test with the zstd patch reverted though. :) Thanks, Ahmad > > > > Enrico > > Footnotes: > [1] https://developer.arm.com/documentation/den0024/a/An-Introduction-to-the-ARMv8-Instruction-Sets/The-ARMv8-instruction-sets/Addressing > > [2] https://github.com/mattconte/tlsf/issues/16 > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
