Previous commit added imx8m_feat_ctrl_init() which can be used to
initialize a feature controller for i.MX8M. Add a standalone driver with
new compatibles that can be described in the device tree to control
feature gating of peripherals.
[afa: This is a RFC. I lean towards the OCOTP driver calling
imx8m_feat_ctrl_init(). See previous commits]
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
drivers/soc/imx/imx8m-featctrl.c | 37 ++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/drivers/soc/imx/imx8m-featctrl.c b/drivers/soc/imx/imx8m-featctrl.c
index 480c80e6c1d9..c9fedfde1488 100644
--- a/drivers/soc/imx/imx8m-featctrl.c
+++ b/drivers/soc/imx/imx8m-featctrl.c
@@ -5,6 +5,10 @@
#include <linux/bitmap.h>
#include <featctrl.h>
#include <soc/imx8m/featctrl.h>
+#include <asm/unaligned.h>
+#include <of.h>
+#include <init.h>
+#include <linux/nvmem-consumer.h>
#include <dt-bindings/features/imx8m.h>
@@ -62,3 +66,36 @@ int imx8m_feat_ctrl_init(struct device_d *dev, u32 tester4,
return feature_controller_register(&priv->feat);
}
+
+static int imx8m_featctrl_probe(struct device_d *dev)
+{
+ const struct imx8m_featctrl_data *data = device_get_match_data(dev);
+ u32 tester4;
+ int ret;
+
+ ret = nvmem_cell_read_variable_le_u32(dev, "tester4", &tester4);
+ if (ret)
+ return ret;
+
+ return imx8m_feat_ctrl_init(dev, tester4, data);
+}
+
+static const struct imx8m_featctrl_data imx8mm_featctrl_data = {
+ .vpu_bitmask = 0x1c0000
+};
+static const struct imx8m_featctrl_data imx8mn_featctrl_data = {
+ .gpu_bitmask = 0x1000000
+};
+
+static const struct of_device_id imx8m_featctrl_dt_ids[] = {
+ { .compatible = "barebox,imx8mm-featctrl", &imx8mm_featctrl_data },
+ { .compatible = "barebox,imx8mn-featctrl", &imx8mn_featctrl_data },
+ { /* sentinel */ }
+};
+
+static struct driver_d imx8m_featctrl_driver = {
+ .name = "imx8m-featctrl",
+ .probe = imx8m_featctrl_probe,
+ .of_compatible = imx8m_featctrl_dt_ids,
+};
+coredevice_platform_driver(imx8m_featctrl_driver);
--
2.30.2
