Hi!
Am Montag, dem 20.06.2022 um 15:19 +0200 schrieb Ahmad Fatoum:
> Hi,
>
> On 20.06.22 14:47, Teresa Remmet wrote:
> > Am Montag, dem 20.06.2022 um 14:38 +0200 schrieb Ahmad Fatoum:
> > > On 20.06.22 14:27, Teresa Remmet wrote:
> > > > I have set the DDRC_ADDRMAP7 register manually in the RAM
> > > > configuration
> > > > in such a case. As I don't see a solution that fits for all.
> > > > But
> > > > would
> > > > be happy for one. :)
> > >
> > > What would the 'neutral' value to write into this register be?
> > > zero
> > > seems to not be it.
> >
> > it's
> >
> > 0xf0f for ADDRMAP7.
> >
> > Reference Manual says: "If set to 15, row address bit X is set to
> > 0"
>
> Do newer spreadsheets always generate ADDRMAP7 writes even if the
> value is zero? If so, we could perhaps initialize it to 0xf0f before
> running ddr_cfg_umctl2(). The DDRC seems to be in reset while the
> registers are being written, so this might just work.
this is not so easy to figure out because the spread sheet does
not generate the c headers directly.
But it is true for other ADDRMAP registers where the reset value is also zero.
So I would give it a try.
>
> As 0 is a valid value, I am wondering if this snippet introduced with
> 42d45ef380c5 ("ARM: imx: Add imx8 support for SDRAM with two or more
> bank groups")
> is correct:
>
> if (addrmap[8]) {
> if (FIELD_GET(DDRC_ADDRMAP8_BG_B0, addrmap[8]) != 0b11111)
> banks++;
> if (FIELD_GET(DDRC_ADDRMAP8_BG_B1, addrmap[8]) != 0b111111)
> banks++;
> }
yes, this is wrong. LPDDR4 is no problem at the moment as the
spreadsheet does not set the value and the reset value here is zero.
But DDR4 uses it and there could be a "real" zero set which is then
ignored.
Regards,
Teresa
>
> Thanks,
> Ahmad
>
> > Regards,
> > Teresa
> >
> >
> > > Thanks,
> > > Ahmad
> > >
> > > > Regards,
> > > > Teresa
> > > >
> > > > > > ---
> > > > > > arch/arm/mach-imx/esdctl.c | 2 +-
> > > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-
> > > > > > imx/esdctl.c
> > > > > > index 8dd0ddbbc965..b070ebc62a45 100644
> > > > > > --- a/arch/arm/mach-imx/esdctl.c
> > > > > > +++ b/arch/arm/mach-imx/esdctl.c
> > > > > > @@ -488,7 +488,7 @@ static resource_size_t
> > > > > > imx8m_ddrc_sdram_size(void __iomem *ddrc)
> > > > > >
> > > > > > return imx_ddrc_sdram_size(ddrc, addrmap,
> > > > > > 12, ARRAY_AND_SIZE(col_b),
> > > > > > - 16, ARRAY_AND_SIZE(row_b),
> > > > > > + 18, ARRAY_AND_SIZE(row_b),
> > > > > > reduced_adress_space, true);
> > > > > > }
> > > > > >
>
>
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