We can implement dma_sync functions as compiler barriers when we are
certain that the buffers are in coherent/uncached memory, e.g. because
MMU is only enabled in barebox_arm_entry which hasn't run yet.
This will come in handy when doing mailbox communication in PBL on the
Raspberry Pi.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
Please replace equally-named patch in next with this.
Should fix breakage for !MMU SoCFPGA
---
include/dma.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/include/dma.h b/include/dma.h
index 2a271044f61c..2c4bdfc98fb5 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -56,6 +56,7 @@ static inline int dma_mapping_error(struct device_d *dev, dma_addr_t dma_addr)
(dev->dma_mask && dma_addr > dev->dma_mask);
}
+#ifndef __PBL__
/* streaming DMA - implement the below calls to support HAS_DMA */
#ifndef dma_sync_single_for_cpu
void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
@@ -66,6 +67,27 @@ void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
void dma_sync_single_for_device(dma_addr_t address, size_t size,
enum dma_data_direction dir);
#endif
+#else
+#ifndef dma_sync_single_for_cpu
+/*
+ * assumes buffers are in coherent/uncached memory, e.g. because
+ * MMU is only enabled in barebox_arm_entry which hasn't run yet.
+ */
+static inline void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
+ enum dma_data_direction dir)
+{
+ barrier_data((void *)address);
+}
+#endif
+
+#ifndef dma_sync_single_for_device
+static inline void dma_sync_single_for_device(dma_addr_t address, size_t size,
+ enum dma_data_direction dir)
+{
+ barrier_data((void *)address);
+}
+#endif
+#endif
#ifndef dma_alloc_coherent
void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle);
--
2.30.2
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