From: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx>
Current code sets vccio4 and vccio6 both to 1v8. R2Pro v1.0 needs 3v3
setting on vccio4, else gmac0 (switch for lan-ports) will be damaged.
IO-domain is per default 3v3 so only vccio6 needs to be set to 1v8 and
clear this bit in the 3v3 register.
Fixes: 8ba96c5942d6 ("ARM: rockchip: add BPI-R2-Pro V00 board")
Signed-off-by: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx>
---
arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c | 9 ++++++---
arch/arm/mach-rockchip/include/mach/rockchip.h | 3 +++
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c
index 4c5b4751b3fb..2a6e0700233a 100644
--- a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c
+++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c
@@ -17,10 +17,13 @@ static noinline void rk3568_start(void *fdt_blob_fixed_offset)
void *fdt;
/*
- * Enable vccio4 1.8V and vccio6 1.8V
- * Needed for GMAC to work.
+ * set iodomain vccio6 to 1.8V needed for GMAC1 to work.
+ * vccio4 (gmac0/switch) needs to stay at 3v3 (default)
*/
- writel(RK_SETBITS(0x50), 0xfdc20140);
+ //set bit 6 in PMU_GRF_IO_VSEL0 for vccio6 1v8
+ writel(RK_SETBITS(BIT(6)), PMU_GRF_IO_VSEL0);
+ //clear bit 6 for 3v3 as it was set to 1v8
+ writel(RK_CLRBITS(BIT(6)), PMU_GRF_IO_VSEL1);
fdt = fdt_blob_fixed_offset;
diff --git a/arch/arm/mach-rockchip/include/mach/rockchip.h b/arch/arm/mach-rockchip/include/mach/rockchip.h
index f24db36f0161..ff8b1109f858 100644
--- a/arch/arm/mach-rockchip/include/mach/rockchip.h
+++ b/arch/arm/mach-rockchip/include/mach/rockchip.h
@@ -23,6 +23,9 @@ static inline int rk3288_init(void)
#ifdef CONFIG_ARCH_RK3568
int rk3568_init(void);
+#define PMU_GRF 0xfdc20000
+#define PMU_GRF_IO_VSEL0 (PMU_GRF + 0x140)
+#define PMU_GRF_IO_VSEL1 (PMU_GRF + 0x144)
#else
static inline int rk3568_init(void)
{
--
2.25.1
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