Do not drop packets with error status (CRC error, receive error, watchdog
timeout, or overflow) otherwise we wont be able to receive packets from
a switch with enabled tagging.
In case we have switch with tagging enabled, ingress packets will be
modified by the switch. Most probably this will affect CRC calculation,
so all incoming packets are dropped.
Setting FEP and FUP is recommended programming model described in
STM32MP157 reference manual. See "64.9.2 MTL initialization":
Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
---
drivers/net/designware_eqos.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/designware_eqos.c b/drivers/net/designware_eqos.c
index 8d2a21c220..1f97d84880 100644
--- a/drivers/net/designware_eqos.c
+++ b/drivers/net/designware_eqos.c
@@ -112,6 +112,8 @@ struct eqos_mtl_regs {
#define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK 0x3f
#define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC BIT(7)
#define EQOS_MTL_RXQ0_OPERATION_MODE_RSF BIT(5)
+#define EQOS_MTL_RXQ0_OPERATION_MODE_FEP BIT(4)
+#define EQOS_MTL_RXQ0_OPERATION_MODE_FUP BIT(3)
#define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT 16
#define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK 0x7fff
@@ -433,7 +435,9 @@ static int eqos_start(struct eth_device *edev)
/* Enable Store and Forward mode for RX, since no jumbo frame */
setbits_le32(&eqos->mtl_regs->rxq0_operation_mode,
- EQOS_MTL_RXQ0_OPERATION_MODE_RSF);
+ EQOS_MTL_RXQ0_OPERATION_MODE_RSF |
+ EQOS_MTL_RXQ0_OPERATION_MODE_FEP |
+ EQOS_MTL_RXQ0_OPERATION_MODE_FUP);
/* Transmit/Receive queue fifo size; use all RAM for 1 queue */
val = readl(&eqos->mac_regs->hw_feature1);
--
2.30.2
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