clk: stm32mp1: fix infinite recursion with composite clock
Linux clk_hw_reparent does some accounting, which seems to be not necessary
for barebox. It does not do any hardware access and is distinct from
clk_hw_set_parent. The faulty barebox implementation, however,
configures a new parent leading to:
&rcc {
assigned-clocks = <&rcc ETHCK_K>;
assigned-clock-parents = <&rcc PLL4_P>;
};
to trigger an infinite recursion: ETHCK will have its parent set, then
set the parent of its mux sibling, which in turn sets ETHCK and so on.
Restore old working behavior.
Fixes: 3045cc773a94 ("clk: stm32mp1: sync with Linux v5.17-rc1")
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
Please fixup
---
drivers/clk/clk-stm32mp1.c | 17 +----------------
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index 3e0c15ee32b9..c4b03e9f6d74 100644
--- a/drivers/clk/clk-stm32mp1.c
+++ b/drivers/clk/clk-stm32mp1.c
@@ -704,22 +704,7 @@ static int clk_mmux_get_parent(struct clk_hw *hw)
static int clk_mmux_set_parent(struct clk_hw *hw, u8 index)
{
- struct clk_mux *mux = to_clk_mux(hw);
- struct stm32_clk_mmux *clk_mmux = to_clk_mmux(mux);
- struct clk_hw *hwp;
- int ret, n;
-
- ret = clk_mux_ops.set_parent(hw, index);
- if (ret)
- return ret;
-
- hwp = clk_hw_get_parent(hw);
-
- for (n = 0; n < clk_mmux->mmux->nbr_clk; n++)
- if (clk_mmux->mmux->hws[n] != hw)
- clk_hw_reparent(clk_mmux->mmux->hws[n], hwp);
-
- return 0;
+ return clk_mux_ops.set_parent(hw, index);
}
static const struct clk_ops clk_mmux_ops = {
--
2.30.2
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