The SysTick is a simple 24-bit system timer that's required for ARMv7-M
implementations. Add a clocksource driver for it for Cortex-M system
support.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
drivers/clocksource/Kconfig | 5 ++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/armv7m_systick.c | 87 ++++++++++++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 drivers/clocksource/armv7m_systick.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c6ca72d4e927..9fae1f2d352e 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -115,4 +115,9 @@ config CLINT_TIMER
This option enables the CLINT timer for RISC-V systems. The CLINT
driver is usually used for NoMMU RISC-V systems.
+config ARMV7M_SYSTICK
+ bool "Support for the ARMv7M system timer" if COMPILE_TEST
+ help
+ This option enables support for the ARMv7M system timer unit.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 21fd83a0930b..a4a7b84fae0c 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_CLOCKSOURCE_TI_DM) += timer-ti-dm.o
obj-$(CONFIG_CLOCKSOURCE_TI_32K) += timer-ti-32k.o
obj-$(CONFIG_CLINT_TIMER) += timer-clint.o
obj-$(CONFIG_RISCV_TIMER) += timer-riscv.o
+obj-$(CONFIG_ARMV7M_SYSTICK) += armv7m_systick.o
diff --git a/drivers/clocksource/armv7m_systick.c b/drivers/clocksource/armv7m_systick.c
new file mode 100644
index 000000000000..5f9222c50b8a
--- /dev/null
+++ b/drivers/clocksource/armv7m_systick.c
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) Maxime Coquelin 2015
+ * Author: Maxime Coquelin <mcoquelin.stm32@xxxxxxxxx>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <io.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#define SYST_CSR 0x00
+#define SYST_RVR 0x04
+#define SYST_CVR 0x08
+#define SYST_CALIB 0x0c
+
+#define SYSTICK_CTRL_EN BIT(0)
+/* Clock source: 0 = Ref clock, 1 = CPU clock */
+#define SYSTICK_CTRL_CPU_CLK BIT(2)
+#define SYSTICK_CAL_NOREF BIT(31)
+
+#define SYSTICK_LOAD_RELOAD_MASK 0x00FFFFFF
+
+static __iomem void *systick_base;
+
+static u64 armv7m_systick_clocksource_read(void)
+{
+ return SYSTICK_LOAD_RELOAD_MASK - readl(systick_base + SYST_CVR);
+}
+
+static struct clocksource cs = {
+ .read = armv7m_systick_clocksource_read,
+ .mask = CLOCKSOURCE_MASK(24),
+ .shift = 0,
+};
+
+static int armv7m_systick_probe(struct device_d *dev)
+{
+ struct clk *clk = NULL;
+ u32 rate, cal;
+ int ret;
+
+ systick_base = dev_request_mem_region_err_null(dev, 0);
+ if (!systick_base)
+ return -ENOENT;
+
+ ret = of_property_read_u32(dev->device_node, "clock-frequency", &rate);
+ if (ret) {
+ clk = clk_get(dev, NULL);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ ret = clk_enable(clk);
+ if (ret)
+ return ret;
+
+ rate = clk_get_rate(clk);
+ if (!rate)
+ return -EINVAL;
+ }
+
+ writel_relaxed(SYSTICK_LOAD_RELOAD_MASK, systick_base + SYST_RVR);
+
+ cal = readl(&systick_base + SYST_CALIB);
+ if (cal & SYSTICK_CAL_NOREF)
+ writel(SYSTICK_CTRL_EN | SYSTICK_CTRL_CPU_CLK, systick_base + SYST_CSR);
+ else
+ writel(SYSTICK_CTRL_EN, systick_base + SYST_CSR);
+
+ cs.mult = clocksource_hz2mult(rate, cs.shift);
+
+ return init_clock(&cs);
+}
+
+static struct of_device_id armv7m_systick_dt_ids[] = {
+ { .compatible = "arm,armv7m-systick", },
+ { }
+};
+
+static struct driver_d armv7m_systick_driver = {
+ .name = "armv7m-systick-timer",
+ .probe = armv7m_systick_probe,
+ .of_compatible = DRV_OF_COMPAT(armv7m_systick_dt_ids),
+};
+postcore_platform_driver(armv7m_systick_driver);
--
2.30.2
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