To make deep-probe work properly, we need clock support be registered as
driver to related device.
To avoid regression, deep-probe is enabled in the same patch.
Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
---
arch/arm/boards/raspberry-pi/rpi-common.c | 75 +-----------------
drivers/clk/Makefile | 1 +
drivers/clk/clk-rpi.c | 93 +++++++++++++++++++++++
3 files changed, 96 insertions(+), 73 deletions(-)
create mode 100644 drivers/clk/clk-rpi.c
diff --git a/arch/arm/boards/raspberry-pi/rpi-common.c b/arch/arm/boards/raspberry-pi/rpi-common.c
index 43e7e66e0f..53c476c22a 100644
--- a/arch/arm/boards/raspberry-pi/rpi-common.c
+++ b/arch/arm/boards/raspberry-pi/rpi-common.c
@@ -2,6 +2,7 @@
// SPDX-FileCopyrightText: 2009 Carlo Caione <carlo@xxxxxxxxxxxxxxx>
#include <common.h>
+#include <deep-probe.h>
#include <init.h>
#include <fs.h>
#include <of.h>
@@ -45,12 +46,6 @@ struct msg_get_arm_mem {
u32 end_tag;
};
-struct msg_get_clock_rate {
- struct bcm2835_mbox_hdr hdr;
- struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
- u32 end_tag;
-};
-
struct msg_get_board_rev {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_board_rev get_board_rev;
@@ -80,22 +75,6 @@ static int rpi_get_arm_mem(u32 *size)
return 0;
}
-static struct clk *rpi_register_firmware_clock(u32 clock_id, const char *name)
-{
- BCM2835_MBOX_STACK_ALIGN(struct msg_get_clock_rate, msg);
- int ret;
-
- BCM2835_MBOX_INIT_HDR(msg);
- BCM2835_MBOX_INIT_TAG(&msg->get_clock_rate, GET_CLOCK_RATE);
- msg->get_clock_rate.body.req.clock_id = clock_id;
-
- ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
- if (ret)
- return ERR_PTR(ret);
-
- return clk_fixed(name, msg->get_clock_rate.body.resp.rate_hz);
-}
-
static void rpi_set_usbethaddr(void)
{
BCM2835_MBOX_STACK_ALIGN(struct msg_get_mac_address, msg);
@@ -343,57 +322,6 @@ static int rpi_postcore_init(void)
}
postcore_initcall(rpi_postcore_init);
-static int rpi_clock_init(void)
-{
- struct clk *clk;
-
- clk = rpi_register_firmware_clock(BCM2835_MBOX_CLOCK_ID_EMMC,
- "bcm2835_mci0");
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-
- clkdev_add_physbase(clk, 0x20300000, NULL);
- clkdev_add_physbase(clk, 0x3f300000, NULL);
-
- clk = rpi_register_firmware_clock(BCM2835_MBOX_CLOCK_ID_CORE,
- "bcm2835_sdhost");
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-
- clkdev_add_physbase(clk, 0x20202000, NULL);
- clkdev_add_physbase(clk, 0x3f202000, NULL);
-
- return 0;
-}
-postconsole_initcall(rpi_clock_init);
-
-static int rpi_console_clock_init(void)
-{
- struct clk *clk;
-
- clk = clk_fixed("apb_pclk", 0);
- clk_register_clkdev(clk, "apb_pclk", NULL);
-
- clk = clk_fixed("uart0-pl0110", 48 * 1000 * 1000);
- clk_register_clkdev(clk, NULL, "uart0-pl0110");
- clkdev_add_physbase(clk, BCM2835_PL011_BASE, NULL);
- clkdev_add_physbase(clk, BCM2836_PL011_BASE, NULL);
-
- clk = rpi_register_firmware_clock(BCM2835_MBOX_CLOCK_ID_CORE,
- "uart1-8250");
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-
- clkdev_add_physbase(clk, BCM2835_MINIUART_BASE, NULL);
- clkdev_add_physbase(clk, BCM2836_MINIUART_BASE, NULL);
-
- clk = clk_fixed("bcm2835-cs", 1 * 1000 * 1000);
- clk_register_clkdev(clk, NULL, "bcm2835-cs");
-
- return 0;
-}
-postcore_initcall(rpi_console_clock_init);
-
static int rpi_env_init(void)
{
struct stat s;
@@ -559,6 +487,7 @@ static const struct of_device_id rpi_of_match[] = {
{ .compatible = "raspberrypi,3-compute-module-lite" },
{ /* sentinel */ },
};
+BAREBOX_DEEP_PROBE_ENABLE(rpi_of_match);
static struct driver_d rpi_board_driver = {
.name = "board-rpi",
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 499df2fe39..9675d45dc9 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_ARCH_LAYERSCAPE) += clk-qoric.o
obj-y += analogbits/
obj-$(CONFIG_CLK_SIFIVE) += sifive/
obj-$(CONFIG_SOC_STARFIVE) += starfive/
+obj-$(CONFIG_MACH_RPI_COMMON) += clk-rpi.o
diff --git a/drivers/clk/clk-rpi.c b/drivers/clk/clk-rpi.c
new file mode 100644
index 0000000000..794d95a591
--- /dev/null
+++ b/drivers/clk/clk-rpi.c
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <linux/clk.h>
+#include <io.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+
+#include <mach/core.h>
+#include <mach/mbox.h>
+#include <mach/platform.h>
+
+struct msg_get_clock_rate {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
+ u32 end_tag;
+};
+
+static struct clk *rpi_register_firmware_clock(u32 clock_id, const char *name)
+{
+ BCM2835_MBOX_STACK_ALIGN(struct msg_get_clock_rate, msg);
+ int ret;
+
+ BCM2835_MBOX_INIT_HDR(msg);
+ BCM2835_MBOX_INIT_TAG(&msg->get_clock_rate, GET_CLOCK_RATE);
+ msg->get_clock_rate.body.req.clock_id = clock_id;
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
+ if (ret)
+ return ERR_PTR(ret);
+
+ return clk_fixed(name, msg->get_clock_rate.body.resp.rate_hz);
+}
+
+static int bcm2835_cprman_init(struct device_node *np)
+{
+ struct device_node *mbox_node;
+ struct clk *clk;
+ int ret;
+
+ mbox_node = of_find_compatible_node(NULL, NULL, "brcm,bcm2835-mbox");
+ if (!mbox_node) {
+ pr_err("Missing mbox node\n");
+ return -ENOENT;
+ }
+
+ ret = of_device_ensure_probed(mbox_node);
+ if (ret) {
+ pr_err("Can't probe mbox node. %i\n", ret);
+ return ret;
+ }
+
+ clk = rpi_register_firmware_clock(BCM2835_MBOX_CLOCK_ID_EMMC,
+ "bcm2835_mci0");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ clkdev_add_physbase(clk, 0x20300000, NULL);
+ clkdev_add_physbase(clk, 0x3f300000, NULL);
+
+ clk = rpi_register_firmware_clock(BCM2835_MBOX_CLOCK_ID_CORE,
+ "bcm2835_sdhost");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ clkdev_add_physbase(clk, 0x20202000, NULL);
+ clkdev_add_physbase(clk, 0x3f202000, NULL);
+
+ clk = clk_fixed("apb_pclk", 0);
+ clk_register_clkdev(clk, "apb_pclk", NULL);
+
+ clk = clk_fixed("uart0-pl0110", 48 * 1000 * 1000);
+ clk_register_clkdev(clk, NULL, "uart0-pl0110");
+ clkdev_add_physbase(clk, BCM2835_PL011_BASE, NULL);
+ clkdev_add_physbase(clk, BCM2836_PL011_BASE, NULL);
+
+ clk = rpi_register_firmware_clock(BCM2835_MBOX_CLOCK_ID_CORE,
+ "uart1-8250");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ clkdev_add_physbase(clk, BCM2835_MINIUART_BASE, NULL);
+ clkdev_add_physbase(clk, BCM2836_MINIUART_BASE, NULL);
+
+ clk = clk_fixed("bcm2835-cs", 1 * 1000 * 1000);
+ clk_register_clkdev(clk, NULL, "bcm2835-cs");
+
+ return 0;
+}
+/* CLK_OF_DECLARE should be used to make it probed before amba,pl011 */
+CLK_OF_DECLARE(bcm2835_cprman, "brcm,bcm2835-cprman", bcm2835_cprman_init);
--
2.30.2
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