On Fri, Dec 03, 2021 at 07:33:40AM +0100, Ahmad Fatoum wrote:
> Zifencei emulaton was added for bare bones 32-bit targets, but the code
> is there on 64-bit too. The instruction skip at the end of the function
> skips 4 bytes, the size of an instruction on both rv32 and rv64. The
> instruction decoder however assumes instructions are size(long) bytes,
> which is 8 > 4 on rv64. Fix this.
>
> Signed-off-by: Ahmad Fatoum <ahmad@xxxxxx>
> ---
> arch/riscv/cpu/interrupts.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks
Sascha
>
> diff --git a/arch/riscv/cpu/interrupts.c b/arch/riscv/cpu/interrupts.c
> index 0e8951b61968..1f2d7b885737 100644
> --- a/arch/riscv/cpu/interrupts.c
> +++ b/arch/riscv/cpu/interrupts.c
> @@ -122,7 +122,7 @@ unsigned long handle_trap(struct pt_regs *regs)
> goto skip;
>
> if (regs->cause == 2) { /* illegal instruction */
> - switch(*(unsigned long *)regs->epc) {
> + switch(*(u32 *)regs->epc) {
> case 0x0000100f: /* fence.i */
> goto skip;
> default:
> --
> 2.33.0
>
>
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