We have three architectures defining sync_caches_for_execution(). Have
them all do so in a header of the same name to allow using it in common
code later on, like in an EFI image loading routine.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
arch/arm/include/asm/cache.h | 3 +++
arch/kvx/include/asm/cache.h | 3 +++
arch/riscv/include/asm/barebox-riscv.h | 3 +--
arch/riscv/include/asm/{cacheflush.h => cache.h} | 9 +++++++--
arch/riscv/lib/reloc.c | 2 +-
include/asm-generic/cache.h | 9 +++++++++
6 files changed, 24 insertions(+), 5 deletions(-)
rename arch/riscv/include/asm/{cacheflush.h => cache.h} (59%)
create mode 100644 include/asm-generic/cache.h
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index bf3a1a0ed291..9ebe80dc89bc 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -21,6 +21,9 @@ int arm_set_cache_functions(void);
void arm_early_mmu_cache_flush(void);
void arm_early_mmu_cache_invalidate(void);
+#define sync_caches_for_execution sync_caches_for_execution
void sync_caches_for_execution(void);
+#include <asm-generic/cache.h>
+
#endif
diff --git a/arch/kvx/include/asm/cache.h b/arch/kvx/include/asm/cache.h
index 0bf3c8f06ef5..72de5d804faa 100644
--- a/arch/kvx/include/asm/cache.h
+++ b/arch/kvx/include/asm/cache.h
@@ -10,6 +10,7 @@
void invalidate_dcache_range(unsigned long addr, unsigned long stop);
+#define sync_caches_for_execution sync_caches_for_execution
static inline void sync_caches_for_execution(void)
{
__builtin_kvx_fence();
@@ -28,4 +29,6 @@ static inline void dcache_inval(void)
__builtin_kvx_dinval();
}
+#include <asm-generic/cache.h>
+
#endif /* __KVX_CACHE_H */
diff --git a/arch/riscv/include/asm/barebox-riscv.h b/arch/riscv/include/asm/barebox-riscv.h
index abb320242769..5c87d37c9eb8 100644
--- a/arch/riscv/include/asm/barebox-riscv.h
+++ b/arch/riscv/include/asm/barebox-riscv.h
@@ -20,6 +20,7 @@
#include <asm/sections.h>
#include <asm/barebox-riscv-head.h>
#include <asm/system.h>
+#include <asm/cache.h>
unsigned long get_runtime_offset(void);
@@ -27,8 +28,6 @@ void setup_c(void);
void relocate_to_current_adr(void);
void relocate_to_adr(unsigned long target);
-void sync_caches_for_execution(void);
-
void __noreturn __naked barebox_riscv_entry(unsigned long membase, unsigned long memsize,
void *boarddata, unsigned int flags);
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cache.h
similarity index 59%
rename from arch/riscv/include/asm/cacheflush.h
rename to arch/riscv/include/asm/cache.h
index 9ff25740c66b..9a0b9326b22d 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cache.h
@@ -3,8 +3,8 @@
* Copyright (C) 2015 Regents of the University of California
*/
-#ifndef _ASM_RISCV_CACHEFLUSH_H
-#define _ASM_RISCV_CACHEFLUSH_H
+#ifndef _ASM_RISCV_CACHE_H
+#define _ASM_RISCV_CACHE_H
static inline void local_flush_icache_all(void)
{
@@ -13,4 +13,9 @@ static inline void local_flush_icache_all(void)
#endif
}
+#define sync_caches_for_execution sync_caches_for_execution
+void sync_caches_for_execution(void);
+
+#include <asm-generic/cache.h>
+
#endif /* _ASM_RISCV_CACHEFLUSH_H */
diff --git a/arch/riscv/lib/reloc.c b/arch/riscv/lib/reloc.c
index 479d586afdee..da53c50448d7 100644
--- a/arch/riscv/lib/reloc.c
+++ b/arch/riscv/lib/reloc.c
@@ -5,7 +5,7 @@
#include <linux/linkage.h>
#include <asm/sections.h>
#include <asm/barebox-riscv.h>
-#include <asm/cacheflush.h>
+#include <asm/cache.h>
#include <debug_ll.h>
#include <asm-generic/module.h>
diff --git a/include/asm-generic/cache.h b/include/asm-generic/cache.h
new file mode 100644
index 000000000000..a766d835fdd7
--- /dev/null
+++ b/include/asm-generic/cache.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __ASM_GENERIC_CACHE_H_
+
+#ifndef sync_caches_for_execution
+#define sync_caches_for_execution() (void)0
+#endif
+
+#endif
--
2.30.2
_______________________________________________
barebox mailing list
barebox@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/barebox
