Re: [PATCH v2 2/2] net: phy: micrel: sync init code for ksz80xx variants with the kernel driver

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On Wed, Oct 13, 2021 at 03:25:17AM -0700, Trent Piepho wrote:
> On Wed, Oct 13, 2021 at 2:43 AM Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx> wrote:
> >
> > Sync part of barebox micrel driver with the kernel v5.15-rc1.
> > This change will affect most of by barebox supported 100Mbit/ksz80xx PHY
> > variants and provide unified devicetree support for LED and clock configuration.
> 
> I already added LED mode OF support to this driver.

Yes, it was partially incorrect. It attempted to write to not existing or not
documented register of PHY_ID_KS8737.

This is the reason why I prefer to share driver code base with kernel,
where possible.

> >  drivers/net/phy/micrel.c | 249 +++++++++++++++++++++++++++++++++++----
> >  1 file changed, 228 insertions(+), 21 deletions(-)
> 
> 227 added lines is a lot to do basically nothing not already done.

I'm not sure what is your point

> >  #define KSZ8051_RMII_50MHZ_CLK                 BIT(7)
> > +#define KSZPHY_RMII_REF_CLK_SEL                        BIT(7)
> 
> These are the same bit in the same register!

Thank you! I'll fix it.

Regards,
Oleksij
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