On Tue, Oct 12, 2021 at 3:10 AM Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx> wrote:
>
> Port devicetree based clock select support from kernel micrel driver (v5.15-rc1).
> This support is needed to make netboot work on boards with PHY node and
> "rmii-ref" property.
Existing boards use a phy fixup to handle this case, e.g. fsl,imx6ull-14x14-evk:
static int nxp_imx6ull_evk_init(void)
{
phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
ksz8081_phy_fixup);
static int ksz8081_phy_fixup(struct phy_device *dev)
{
phy_write(dev, 0x1f, 0x8190);
phy_write(dev, 0x16, 0x202);
I thought about extending micrel driver like this when I added support
for NXP imx6ul (single L, not double L as above) dev kit but decided
it was a lot of code for what ends up being one register write for
boards using a ksz8081 and the barebox phy fixup concept, which
handles this in only a couple lines, was easier.
Also look at ks8051_config_init(), it checks phydev->dev_flags to set
this same bit. But AFAICT, dev_flags is not used in Barebox.
> +/* PHY Control 2 / PHY Control (if no PHY Control 1) */
> +#define MII_KSZPHY_CTRL_2 0x1f
> +#define KSZPHY_RMII_REF_CLK_SEL BIT(7)
These are already in this file as MII_KSZPHY_CTRL and KSZ8051_RMII_50MHZ_CLK.
> +struct kszphy_type {
> + bool has_rmii_ref_clk_sel;
> +};
> +
> +struct kszphy_priv {
> + const struct kszphy_type *type;
type does not appear to be used from the state struct.
> + bool rmii_ref_clk_sel;
> + bool rmii_ref_clk_sel_val;
All you need is a single flag to indicate the KSZ8051_RMII_50MHZ_CLK
bit should be set after a reset. Otherwise it can be left unset,
which is the default value.
> +static const struct kszphy_type ksz8081_type = {
> + .has_rmii_ref_clk_sel = true,
> +};
Note that not just KSZ8081 has this bit. Also KSZ8021, KSZ8031, and
KSZ8051, which has the existing different method to handle it, as
described earlier.
> +static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val)
> +{
> + int ctrl;
> +
> + ctrl = phy_read(phydev, MII_KSZPHY_CTRL);
> + if (ctrl < 0)
> + return ctrl;
> +
> + if (val)
> + ctrl |= KSZPHY_RMII_REF_CLK_SEL;
> + else
> + ctrl &= ~KSZPHY_RMII_REF_CLK_SEL;
> +
> + return phy_write(phydev, MII_KSZPHY_CTRL, ctrl);
> +}
phy_set_bits(phydev, MII_KSZPHY_CTRL, KSZ8051_RMII_50MHZ_CLK);
> +
> + /* Support legacy board-file configuration */
> + if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
> + priv->rmii_ref_clk_sel = true;
> + priv->rmii_ref_clk_sel_val = true;
> + }
Can't code in ksz8051_config_init be removed then?
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