On 17.08.21 12:16, Antony Pavlov wrote: > On Wed, 11 Aug 2021 10:52:53 +0200 > Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> wrote: > > Hi Ahmad! > >> Hello Antony, >> >> On 25.05.21 09:19, Antony Pavlov wrote: >>> Changes since v2: >>> >>> * rebase on top of master branch (f873c7ff2497) + >>> "RISC-V: extend multi-image to support both S- and M-Mode" >>> (http://lists.infradead.org/pipermail/barebox/2021-May/036086.html). >>> * "litex serial: add setbrg callback" patch by Marek Czerski is added >>> for review; >>> * fix "clocksource: timer-riscv: select CSR from device tree" patch; >>> * change gpio IP-block base addresses in litex dts; >>> * gpio-74xx-mmio uses device_get_match_data() now. >>> >>> Changes since v1: >>> >>> * rebased on top of next branch; >>> * new patches are introduced: >>> * clocksource: timer-riscv: select CSR from device tree >>> * RISC-V: make RISCV_SBI and RISCV_M_MODE explicitly mutually exclusive >>> * RISC-V: make it possible to build RV32I multi-image with DEBUG_LL=n >>> * almost all of Ahmad's notes are fixed (e.g. unused header files inclusions are dropped); >>> * NOT FIXED: gpio-74xx-mmio still uses dev_get_drvdata(), not device_get_match_data() >>> >>> Antony Pavlov (9): >>> clocksource: timer-riscv: select CSR from device tree >>> RISC-V: make it possible to run nmon from PBL C code >>> RISC-V: boards: erizo: make it possible to use nmon >>> serial: add litex UART driver >>> gpio: add driver for 74xx-ICs with MMIO access >>> spi: add litex spiflash driver >>> net: add LiteEth driver >>> RISC-V: add LiteX SoC and linux-on-litex-vexriscv support >>> RISC-V: add litex_linux_defconfig >>> >>> Marek Czerski (1): >>> litex serial: add setbrg callback >> >> I'd like to give this a try eventually while following: >> https://github.com/enjoy-digital/litex/wiki/Use-LiteX-on-the-Acorn-CLE-215 >> >> Do you intend to submit a new revision soon? Is it ok for you if I respin >> this series? > > Sorry for delay with reply, I was on vacation. No worries. :) > > I have just resend litex patchseries v4. > I have tested it with linux binaries from this repo: > > https://github.com/frantony/arty-linux-on-litex-vexriscv-prebuilt > > What do you want to respin in the litex patchseries? Just rebase, address feedback and give it a try. Thanks for the respin. Building and loading linux-on-litex-vexriscv onto my FPGA worked, so I'll give your series a try as well later. (What doesn't yet work is use as PCIe endpoint[1]. Still monkey debugging that) [1]: https://github.com/enjoy-digital/litepcie/issues/54 Cheers, Ahmad > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
