The i.MX8MM reference manual follows long established tradition in not
documenting BootROM magic reboot codes. For older i.MX variants, the
values can be seen in the bmode tables of Freescale's U-Boot patches.
There are no such patches for the i.MX8M, but testing shows that
mw 0x30390094 0x10 ; mw 0x30390098 0x40000000
is one of the configurations that trigger serial download on next warm
reset on an i.MX8MM. Describe this in the device tree, so
gpr.reboot_mode.next=serial reset -r imxwd-warm
does the right thing for that SoC.
This all might work for other i.MX8M variants as well, but the dtsi
can be genericized later on when tested.
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
Cc: David Jander <david@xxxxxxxxxxx>
Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
---
Documentation/boards/imx.rst | 29 +++++++++++++++++++++++++++++
arch/arm/dts/imx8mm-evk.dts | 1 +
arch/arm/dts/imx8mm-prt8mm.dts | 1 +
arch/arm/dts/imx8mm.dtsi | 18 ++++++++++++++++++
4 files changed, 49 insertions(+)
create mode 100644 arch/arm/dts/imx8mm.dtsi
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst
index 887b45c70881..4ce9d9808cc1 100644
--- a/Documentation/boards/imx.rst
+++ b/Documentation/boards/imx.rst
@@ -83,6 +83,35 @@ The images can also always be started as second stage on the target:
barebox@Board Name:/ bootm /mnt/tftp/barebox-freescale-imx51-babbage.img
+BootROM Reboot mode codes (bmode)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+For select SoCs, barebox supports communicating an alternative boot medium
+that BootROM should select after a warm reset::
+
+ barebox@FSL i.MX8MM EVK board:/ devinfo gpr.reboot_mode
+ Driver: syscon-reboot-mode
+ Bus: platform
+ Parent: 30390000.reset-controller@xxxxxxxxxxx
+ Parameters:
+ next: normal (type: enum) (values: "normal", "serial")
+ prev: normal (type: enum) (values: "normal", "serial")
+ Device node: /soc@0/bus@30000000/reset-controller@30390000/reboot-mode
+ reboot-mode {
+ compatible = "barebox,syscon-reboot-mode";
+ offset = <0x94 0x98>;
+ mask = <0xffffffff 0x40000000>;
+ mode-normal = <0x0 0x0>;
+ mode-serial = <0x10 0x40000000>;
+ };
+
+ barebox@FSL i.MX8MM EVK board:/ gpr.reboot_mode.next=serial reset -r imxwd-warm
+
+This will cause barebox to fall into serial download mode on an i.MX8MM.
+
+Different SoCs may have more possible reboot modes available.
+See the section on :ref:`Reboot modes<reboot_mode>` for more information.
+
High Assurance Boot
^^^^^^^^^^^^^^^^^^^
diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts
index 1e8619ccf584..304f150307a3 100644
--- a/arch/arm/dts/imx8mm-evk.dts
+++ b/arch/arm/dts/imx8mm-evk.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include <arm64/freescale/imx8mm-evk.dts>
+#include "imx8mm.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/imx8mm-prt8mm.dts b/arch/arm/dts/imx8mm-prt8mm.dts
index bdcdd0806243..abd758f2856e 100644
--- a/arch/arm/dts/imx8mm-prt8mm.dts
+++ b/arch/arm/dts/imx8mm-prt8mm.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include <arm64/freescale/imx8mm.dtsi>
+#include "imx8mm.dtsi"
/ {
model = "Protonic PRT8MM";
diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
new file mode 100644
index 000000000000..78bbacb2b1b2
--- /dev/null
+++ b/arch/arm/dts/imx8mm.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/ {
+ aliases {
+ gpr.reboot_mode = &reboot_mode_gpr;
+ };
+};
+
+&src {
+ compatible = "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon", "simple-mfd";
+
+ reboot_mode_gpr: reboot-mode {
+ compatible = "barebox,syscon-reboot-mode";
+ offset = <0x94>, <0x98>; /* SRC_GPR{9,10} */
+ mask = <0xffffffff>, <0x40000000>;
+ mode-normal = <0>, <0>;
+ mode-serial = <0x00000010>, <0x40000000>;
+ };
+};
--
2.30.2
_______________________________________________
barebox mailing list
barebox@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/barebox
