Hello Antony, On 11.05.21 13:11, Antony Pavlov wrote: > On Tue, 11 May 2021 08:41:44 +0200 > Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> wrote: > >> We can't currently mix S-Mode and M-Mode images in the same build >> and there's no straight-forward way to determine which mode we are in. >> >> Move the decision on which mode barebox is targeted at out of Kconfig >> and into the PBL. PBL code can call either barebox_riscv_supervisor_entry >> or barebox_riscv_machine_entry to signal to barebox proper which mode >> it's running in. > > It looks like this comment is slightly outdated. > There is neither barebox_riscv_supervisor_entry nor barebox_riscv_machine_entry > inside the patch. barebox_riscv_machine_entry is defined and used once for Erizo. barebox_riscv_supervisor_entry is defined and used twice, once for HiFive and another for the generic image (used for virt). >> Currently the only user of this information is the >> RISC-V timer clocksource driver. > > Please add necessary mode check to the sbi_init() from arch/riscv/lib/sbi.c too. Yes, I should. Will send fixup later. Cheers, Ahmad > >> Any new code that does IS_ENABLED(CONFIG_RISCV_SBI) or >> IS_ENABLED(CONFIG_RISCV_M_MODE) should also be adapted to use riscv_mode(). >> > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
