The gate clocks need to be able to set their parent's clock rates so
that drivers actually can change their clock rates. The same is done
in Linux.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
drivers/clk/mxs/clk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h
index 60f2408cba..a93361a9ea 100644
--- a/drivers/clk/mxs/clk.h
+++ b/drivers/clk/mxs/clk.h
@@ -35,7 +35,7 @@ static inline struct clk *mxs_clk_fixed(const char *name, int rate)
static inline struct clk *mxs_clk_gate(const char *name,
const char *parent_name, void __iomem *reg, u8 shift)
{
- return clk_gate_inverted(name, parent_name, reg, shift, 0);
+ return clk_gate_inverted(name, parent_name, reg, shift, CLK_SET_RATE_PARENT);
}
static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
--
2.29.2
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