From: Marco Felsch <m.felsch@xxxxxxxxxxxxxx> In case of deep-probe we have to ensure that the memory device is available after the mem_initcall(). Signed-off-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx> Link: https://lore.pengutronix.de/20201021115813.31645-9-m.felsch@xxxxxxxxxxxxxx Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- arch/arm/mach-imx/esdctl.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index 135a16d111..6df4008c2d 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -706,7 +706,17 @@ static struct driver_d imx_esdctl_driver = { .of_compatible = DRV_OF_COMPAT(imx_esdctl_dt_ids), }; -mem_platform_driver(imx_esdctl_driver); +static int imx_esdctl_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_esdctl_driver); + if (ret) + return ret; + + return of_devices_ensure_probed_by_dev_id(imx_esdctl_dt_ids); +} +mem_initcall(imx_esdctl_init); /* * The i.MX SoCs usually have two SDRAM chipselects. The following -- 2.29.2 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
