pci_iomap returns the bar base address, which can already be > 4G on barebox. The comment originates from U-Boot, where indeed only the lower 32-bit are read. We don't have this limitation and qemu -M q35 places bars for VirtIO devices at >= 0x8_0000_0000 and they worked correctly, so drop the inaccurate comment. Signed-off-by: Ahmad Fatoum <ahmad@xxxxxx> --- drivers/virtio/virtio_pci_modern.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c index 180c14771aad..d828bee69e62 100644 --- a/drivers/virtio/virtio_pci_modern.c +++ b/drivers/virtio/virtio_pci_modern.c @@ -335,13 +335,6 @@ static void __iomem *virtio_pci_map_capability(struct pci_dev *dev, int off) offset = off + offsetof(struct virtio_pci_cap, offset); pci_read_config_dword(dev, offset, &offset); - /* - * TODO: adding 64-bit BAR support - * - * Per spec, the BAR is permitted to be either 32-bit or 64-bit. - * For simplicity, only read the BAR address as 32-bit. - */ - return pci_iomap(dev, bar) + offset; } -- 2.30.0 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox