[PATCH 2/4] clk: imx: clk-pllv1: fix wrong PLL recalc on i.MX1/i.MX21

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Adding -Wtype-limits to the build correctly detects that the
first branch (mfn < 0) is never taken as mfn is unsigned.

Import the Linux v5.11 bits that correctly checks the sign of the
sign/magnitude integer. Unlike Linux, we don't need to check
whether it's an i.MX1 or i.MX21 here, because an #ifdef earlier
normalizes the value to be aligned with the i.MX27's.

This however means that a multi-image barebox wasn't and will remain
not able to properly target both <= i.MX21 and newer SoCs at the same time.

This is just build-time tested.

Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
 drivers/clk/imx/clk-pllv1.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-pllv1.c b/drivers/clk/imx/clk-pllv1.c
index 283ae843a75d..36192bb2112a 100644
--- a/drivers/clk/imx/clk-pllv1.c
+++ b/drivers/clk/imx/clk-pllv1.c
@@ -12,12 +12,21 @@
 
 #include "clk.h"
 
+#define MFN_BITS	(10)
+#define MFN_SIGN	(BIT(MFN_BITS - 1))
+#define MFN_MASK	(MFN_SIGN - 1)
+
 struct clk_pllv1 {
 	struct clk clk;
 	void __iomem *reg;
 	const char *parent;
 };
 
+static inline bool mfn_is_negative(unsigned int mfn)
+{
+    return mfn & MFN_SIGN;
+}
+
 static unsigned long clk_pllv1_recalc_rate(struct clk *clk,
 		unsigned long parent_rate)
 {
@@ -50,7 +59,7 @@ static unsigned long clk_pllv1_recalc_rate(struct clk *clk,
 	ll = (unsigned long long)freq * mfn_abs;
 
 	do_div(ll, mfd + 1);
-	if (mfn < 0)
+	if (mfn_is_negative(mfn))
 		ll = (freq * mfi) - ll;
 	else
 		ll = (freq * mfi) + ll;
-- 
2.29.2


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