[PATCH master 3/3] RISC-V: boot: move stack top to very end of memory

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Now that the generic DT entry point used for QEMU virt takes care to
prevent the PBL common code from overwriting the FDT, we can remove
the 2M wasteland after the stack top.
This reduces fragmentation on low memory platforms like erizo.

Reported-by: Antony Pavlov <antonynpavlov@xxxxxxxxx>
Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
---
Fix for master to reduce memory fragmentation on erizo
---
 arch/riscv/include/asm/barebox-riscv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/barebox-riscv.h b/arch/riscv/include/asm/barebox-riscv.h
index 948a562c5c1f..bb1d15308b48 100644
--- a/arch/riscv/include/asm/barebox-riscv.h
+++ b/arch/riscv/include/asm/barebox-riscv.h
@@ -36,7 +36,7 @@ void *barebox_riscv_boot_dtb(void);
 static inline unsigned long riscv_mem_stack_top(unsigned long membase,
 						unsigned long endmem)
 {
-	return endmem - SZ_2M;
+	return endmem;
 }
 
 static inline unsigned long riscv_mem_stack(unsigned long membase,
-- 
2.29.2


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