> > So you load pbl/bare init barebox into SRAM, run PBIT memory test on DRAM, > then extract/copy barebox proper to DRAM or how does it work? > [Barbier, Renaud] For now I have never used PBL on ARM (lwl-y => obj-y). Probably did not do right as I tweaked the barebox linker script to have a TEXT_BASE. Only reason I did not use PBL is that it did not boot first few time I tried and the other way worked right away. PBIT runs from SPI NOR flash which is not a problem as there is a DDR BIST unit on our ARM SOC. I did include the memtester from pyropus.ca too for a more comprehensive test and obviously it is very slow running from flash with D-cache off. An improvement would be to run from SRAM. >From the barebox_arm-reset_vector, the uart is set to a fixed baud rate, the DDR memory initialized and if PBIT is enabled a quick or comprehensive test is ran. Otherwise use the BIST to initialise ECC if present and then barebox_arm_entry is called to relocate barebox in memory. _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
