On Tue, Jan 26, 2021 at 09:47:07AM +0100, Steffen Trumtrar wrote:
>
> Sascha Hauer <sha@xxxxxxxxxxxxxx> writes:
>
> > On Thu, Jan 21, 2021 at 12:29:55PM +0100, Steffen Trumtrar wrote:
> >> From: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> >>
> >> Add support for potentially defined FPGA-bridges in the overlay.
> >>
> >> While at it also add support for loading the firmware directly via a
> >> path instead of 'needing' an overlay for that.
> >> The direct loading will be done with the existent firmwareload command.
> >>
> >> Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> >> ---
> >> drivers/of/Makefile | 3 +-
> >> drivers/of/of_firmware.c | 88 ++++++++++++++++++++++++++++++++++++----
> >> include/of.h | 21 +++++++---
> >> 3 files changed, 96 insertions(+), 16 deletions(-)
> >>
> >> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> >> index b6847752d2..6199c9791f 100644
> >> --- a/drivers/of/Makefile
> >> +++ b/drivers/of/Makefile
> >> @@ -6,4 +6,5 @@ obj-y += partition.o
> >> obj-y += of_net.o
> >> obj-$(CONFIG_MTD) += of_mtd.o
> >> obj-$(CONFIG_OF_BAREBOX_DRIVERS) += barebox.o
> >> -obj-$(CONFIG_OF_OVERLAY) += overlay.o resolver.o of_firmware.o
> >> +obj-$(CONFIG_OF_OVERLAY) += overlay.o resolver.o
> >> +obj-$(CONFIG_FIRMWARE) += of_firmware.o
> >> diff --git a/drivers/of/of_firmware.c b/drivers/of/of_firmware.c
> >> index 096f84572e..ef0ccd0221 100644
> >> --- a/drivers/of/of_firmware.c
> >> +++ b/drivers/of/of_firmware.c
> >> @@ -4,12 +4,52 @@
> >> */
> >> #include <common.h>
> >> #include <firmware.h>
> >> +#include <fpga-bridge.h>
> >> #include <of.h>
> >>
> >> struct overlay_info {
> >> const char *firmware_path;
> >> };
> >>
> >> +#ifdef CONFIG_FPGA_BRIDGE
> >
> > Trailing whitespace here.
> >
>
> Meh :(
>
> >> +int of_firmware_load_file(const char *path)
> >> +{
> >> + int err;
> >> + struct device_node *target;
> >> +
> >> + target = of_find_compatible_node(NULL, NULL, "fpga-region");
> >
> > This assumes there is only one node compatible to fpga-region. What
> > about others?
>
> Ah, right, it is actually allowed to have multiple regions in one FPGA.
> I didn't think about that.
Also multiple regions in multiple FPGAs
Sascha
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